Commit 5f37c797 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Sebastian Reichel
Browse files

power: reset: at91-reset: add reset_controller_dev support 



SAMA7G5 reset controller has 5 extra lines that goes to different devices
(3 lines to USB PHYs, 1 line to DDR controller, 1 line to DDR PHY
controller). These reset lines could be requested by different controller
drivers (e.g. USB PHY driver) and these controllers' drivers could
assert/deassert these lines when necessary. Thus add support for
reset_controller_dev which brings this functionality.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
parent e17ad25b

drivers/power/reset/at91-reset.c

+102 −4
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/of_address.h>

#include <linux/platform_device.h>

#include <linux/reboot.h>

#include <linux/reset-controller.h>



#include <soc/at91/at91sam9_ddrsdr.h>

#include <soc/at91/at91sam9_sdramc.h>
@@ -65,8 +66,11 @@ enum reset_type { 
 * struct at91_reset - AT91 reset specific data structure

 * @rstc_base:		base address for system reset

 * @ramc_base:		array with base addresses of RAM controllers

 * @dev_base:		base address for devices reset

 * @sclk:		slow clock

 * @data:		platform specific reset data

 * @rcdev:		reset controller device

 * @lock:		lock for devices reset register access

 * @nb:			reset notifier block

 * @args:		SoC specific system reset arguments

 * @ramc_lpr:		SDRAM Controller Low Power Register
@@ -74,13 +78,18 @@ enum reset_type { 
struct at91_reset {

	void __iomem *rstc_base;

	void __iomem *ramc_base[2];

	void __iomem *dev_base;

	struct clk *sclk;

	const struct at91_reset_data *data;

	struct reset_controller_dev rcdev;

	spinlock_t lock;

	struct notifier_block nb;

	u32 args;

	u32 ramc_lpr;

};



#define to_at91_reset(r)	container_of(r, struct at91_reset, rcdev)



/**

 * struct at91_reset_data - AT91 reset data

 * @reset_args:			SoC specific system reset arguments
@@ -222,6 +231,89 @@ static const struct of_device_id at91_reset_of_match[] = { 
};

MODULE_DEVICE_TABLE(of, at91_reset_of_match);



static int at91_reset_update(struct reset_controller_dev *rcdev,

			     unsigned long id, bool assert)

{

	struct at91_reset *reset = to_at91_reset(rcdev);

	unsigned long flags;

	u32 val;



	spin_lock_irqsave(&reset->lock, flags);

	val = readl_relaxed(reset->dev_base);

	if (assert)

		val |= BIT(id);

	else

		val &= ~BIT(id);

	writel_relaxed(val, reset->dev_base);

	spin_unlock_irqrestore(&reset->lock, flags);



	return 0;

}



static int at91_reset_assert(struct reset_controller_dev *rcdev,

			     unsigned long id)

{

	return at91_reset_update(rcdev, id, true);

}



static int at91_reset_deassert(struct reset_controller_dev *rcdev,

			       unsigned long id)

{

	return at91_reset_update(rcdev, id, false);

}



static int at91_reset_dev_status(struct reset_controller_dev *rcdev,

				 unsigned long id)

{

	struct at91_reset *reset = to_at91_reset(rcdev);

	u32 val;



	val = readl_relaxed(reset->dev_base);



	return !!(val & BIT(id));

}



static const struct reset_control_ops at91_reset_ops = {

	.assert = at91_reset_assert,

	.deassert = at91_reset_deassert,

	.status = at91_reset_dev_status,

};



static int at91_reset_of_xlate(struct reset_controller_dev *rcdev,

			       const struct of_phandle_args *reset_spec)

{

	struct at91_reset *reset = to_at91_reset(rcdev);



	if (!reset->data->n_device_reset ||

	    (reset_spec->args[0] < reset->data->device_reset_min_id ||

	     reset_spec->args[0] > reset->data->device_reset_max_id))

		return -EINVAL;



	return reset_spec->args[0];

}



static int at91_rcdev_init(struct at91_reset *reset,

			   struct platform_device *pdev)

{

	if (!reset->data->n_device_reset)

		return 0;



	reset->dev_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 1,

					NULL);

	if (IS_ERR(reset->dev_base))

		return -ENODEV;



	spin_lock_init(&reset->lock);

	reset->rcdev.ops = &at91_reset_ops;

	reset->rcdev.owner = THIS_MODULE;

	reset->rcdev.of_node = pdev->dev.of_node;

	reset->rcdev.nr_resets = reset->data->n_device_reset;

	reset->rcdev.of_reset_n_cells = 1;

	reset->rcdev.of_xlate = at91_reset_of_xlate;



	return devm_reset_controller_register(&pdev->dev, &reset->rcdev);

}



static int __init at91_reset_probe(struct platform_device *pdev)

{

	const struct of_device_id *match;
@@ -272,6 +364,10 @@ static int __init at91_reset_probe(struct platform_device *pdev) 


	platform_set_drvdata(pdev, reset);



	ret = at91_rcdev_init(reset, pdev);

	if (ret)

		goto disable_clk;



	if (of_device_is_compatible(pdev->dev.of_node, "microchip,sam9x60-rstc")) {

		u32 val = readl(reset->rstc_base + AT91_RSTC_MR);
@@ -280,14 +376,16 @@ static int __init at91_reset_probe(struct platform_device *pdev) 
	}



	ret = register_restart_handler(&reset->nb);

	if (ret) {

		clk_disable_unprepare(reset->sclk);

		return ret;

	}

	if (ret)

		goto disable_clk;



	at91_reset_status(pdev, reset->rstc_base);



	return 0;



disable_clk:

	clk_disable_unprepare(reset->sclk);

	return ret;

}



static int __exit at91_reset_remove(struct platform_device *pdev)