Commit 5ecd39d1 authored by Johan Jonker's avatar Johan Jonker Committed by Rob Herring
Browse files

dt-bindings: net: convert emac_rockchip.txt to YAML



Convert emac_rockchip.txt to YAML.

Changes against original bindings:
  Add mdio sub node.
  Add extra clock for rk3036

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220603163539.537-1-jbx6244@gmail.com
parent b600d6a6
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* ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs

Required properties:
- compatible: should be "rockchip,<name>-emac"
   "rockchip,rk3036-emac": found on RK3036 SoCs
   "rockchip,rk3066-emac": found on RK3066 SoCs
   "rockchip,rk3188-emac": found on RK3188 SoCs
- reg: Address and length of the register set for the device
- interrupts: Should contain the EMAC interrupts
- rockchip,grf: phandle to the syscon grf used to control speed and mode
  for emac.
- phy: see ethernet.txt file in the same directory.
- phy-mode: see ethernet.txt file in the same directory.

Optional properties:
- phy-supply: phandle to a regulator if the PHY needs one

Clock handling:
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "hclk" for the host clock needed to calculate and set
  polling period of EMAC and "macref" for the reference clock needed to transfer
  data to and from the phy.

Child nodes of the driver are the individual PHY devices connected to the
MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.

Examples:

ethernet@10204000 {
	compatible = "rockchip,rk3188-emac";
	reg = <0xc0fc2000 0x3c>;
	interrupts = <6>;
	mac-address = [ 00 11 22 33 44 55 ];

	clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
	clock-names = "hclk", "macref";

	pinctrl-names = "default";
	pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;

	rockchip,grf = <&grf>;

	phy = <&phy0>;
	phy-mode = "rmii";
	phy-supply = <&vcc_rmii>;

	#address-cells = <1>;
	#size-cells = <0>;
	phy0: ethernet-phy@0 {
	      reg = <1>;
	};
};
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/rockchip,emac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    enum:
      - rockchip,rk3036-emac
      - rockchip,rk3066-emac
      - rockchip,rk3188-emac

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2
    items:
      - description: host clock
      - description: reference clock
      - description: mac TX/RX clock

  clock-names:
    minItems: 2
    items:
      - const: hclk
      - const: macref
      - const: macclk

  rockchip,grf:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the syscon GRF used to control speed and mode for the EMAC.

  phy-supply:
    description:
      Phandle to a regulator if the PHY needs one.

  mdio:
    $ref: mdio.yaml#
    unevaluatedProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - rockchip,grf
  - phy
  - phy-mode
  - mdio

allOf:
  - $ref: "ethernet-controller.yaml#"
  - if:
      properties:
        compatible:
          contains:
            const: rockchip,rk3036-emac

    then:
      properties:
        clocks:
          minItems: 3

        clock-names:
          minItems: 3

    else:
      properties:
        clocks:
          maxItems: 2

        clock-names:
          maxItems: 2

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3188-cru-common.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    ethernet@10204000 {
      compatible = "rockchip,rk3188-emac";
      reg = <0xc0fc2000 0x3c>;
      interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
      clock-names = "hclk", "macref";
      rockchip,grf = <&grf>;
      pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
      pinctrl-names = "default";
      phy = <&phy0>;
      phy-mode = "rmii";
      phy-supply = <&vcc_rmii>;

      mdio {
        #address-cells = <1>;
        #size-cells = <0>;

        phy0: ethernet-phy@0 {
          reg = <1>;
        };
      };
    };