Commit 5ec60aad authored by Lai Jiangshan's avatar Lai Jiangshan Committed by Paolo Bonzini
Browse files

KVM: VMX: Add and use X86_CR4_TLBFLUSH_BITS when !enable_ept 



In set_cr4_guest_host_mask(), X86_CR4_PGE is set to be intercepted when
!enable_ept just because X86_CR4_PGE is the only bit that is
responsible for flushing TLB but listed in KVM_POSSIBLE_CR4_GUEST_BITS.

It is clearer and self-documented to use X86_CR4_TLBFLUSH_BITS instead.

No functionality changed.

Signed-off-by: default avatarLai Jiangshan <laijs@linux.alibaba.com>
Message-Id: <20211108124407.12187-5-jiangshanlai@gmail.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 40e49c4f

arch/x86/kvm/kvm_cache_regs.h

+2 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
	(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR  \

	 | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE)



#define X86_CR4_TLBFLUSH_BITS (X86_CR4_PGE | X86_CR4_PCIDE | X86_CR4_PAE | X86_CR4_SMEP)



#define BUILD_KVM_GPR_ACCESSORS(lname, uname)				      \

static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\

{									      \

arch/x86/kvm/vmx/vmx.c

+1 −1
Original line number Diff line number Diff line
@@ -4045,7 +4045,7 @@ void set_cr4_guest_host_mask(struct vcpu_vmx *vmx) 
	vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS &

					  ~vcpu->arch.cr4_guest_rsvd_bits;

	if (!enable_ept)

		vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PGE;

		vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLBFLUSH_BITS;

	if (is_guest_mode(&vmx->vcpu))

		vcpu->arch.cr4_guest_owned_bits &=

			~get_vmcs12(vcpu)->cr4_guest_host_mask;