Unverified Commit 5e36946a authored by Mark Brown's avatar Mark Brown
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ASoC: SOF: updates for 5.18

Merge series from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>:

A couple of updates for Intel and AMD hardware, along with minor
cleanups

Ajit Kumar Pandey (4):
  ASoC: SOF: amd: Flush cache after ATU_BASE_ADDR_GRP register update
  ASoC: SOF: amd: Use semaphore register to synchronize ipc's irq
  ASoC: SOF: amd: Move group register configuration to acp-loader
  ASoC: SOF: amd: Increase ACP_HW_SEM_RETRY_COUNT value

Curtis Malainey (1):
  ASoC: SOF: fix 32 signed bit overflow

Gongjun Song (1):
  ASoC: SOF: Intel: pci-tgl: add RPL-S support

Peter Ujfalusi (2):
  ASoC: SOF: amd: acp-pcm: Take buffer information directly from runtime
  ASoC: SOF: amd: Do not set ipc_pcm_params ops as it is optional

Pierre-Louis Bossart (2):
  ASoC: SOF: debug: clarify operator precedence
  ASoC: SOF: Intel: hda: clarify operator precedence

 include/sound/sof/header.h         |  2 +-
 include/uapi/sound/sof/abi.h       |  2 +-
 sound/soc/sof/amd/acp-dsp-offset.h |  1 +
 sound/soc/sof/amd/acp-ipc.c        | 22 ++++++++++++++--------
 sound/soc/sof/amd/acp-loader.c     |  9 +++++++++
 sound/soc/sof/amd/acp-pcm.c        |  7 ++++---
 sound/soc/sof/amd/acp-stream.c     |  3 +++
 sound/soc/sof/amd/acp.c            | 29 ++++++++++++++---------------
 sound/soc/sof/amd/acp.h            |  3 +--
 sound/soc/sof/amd/renoir.c         |  1 -
 sound/soc/sof/debug.c              |  2 +-
 sound/soc/sof/intel/hda.c          |  2 +-
 sound/soc/sof/intel/pci-tgl.c      |  2 ++
 13 files changed, 52 insertions(+), 33 deletions(-)

--
2.30.2
parents 2f4d6de5 0f33105b
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+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@

/* Global Message - Generic */
#define SOF_GLB_TYPE_SHIFT			28
#define SOF_GLB_TYPE_MASK			(0xfL << SOF_GLB_TYPE_SHIFT)
#define SOF_GLB_TYPE_MASK			(0xfUL << SOF_GLB_TYPE_SHIFT)
#define SOF_GLB_TYPE(x)				((x) << SOF_GLB_TYPE_SHIFT)

/* Command Message - Generic */
+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@
/* SOF ABI version major, minor and patch numbers */
#define SOF_ABI_MAJOR 3
#define SOF_ABI_MINOR 19
#define SOF_ABI_PATCH 0
#define SOF_ABI_PATCH 1

/* SOF ABI version number. Format within 32bit word is MMmmmppp */
#define SOF_ABI_MAJOR_SHIFT	24
+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@
#define ACP_DSP_SW_INTR_STAT                    0x1818
#define ACP_SW_INTR_TRIG                        0x181C
#define ACP_ERROR_STATUS			0x18C4
#define ACP_AXI2DAGB_SEM_0			0x1880

/* Registers from ACP_SHA block */
#define ACP_SHA_DSP_FW_QUALIFIER		0x1C70
+14 −8
Original line number Diff line number Diff line
@@ -62,12 +62,26 @@ int acp_sof_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
{
	struct acp_dev_data *adata = sdev->pdata->hw_pdata;
	unsigned int offset = offsetof(struct scratch_ipc_conf, sof_in_box);
	unsigned int count = ACP_HW_SEM_RETRY_COUNT;

	while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_AXI2DAGB_SEM_0)) {
		/* Wait until acquired HW Semaphore Lock or timeout*/
		count--;
		if (!count) {
			dev_err(sdev->dev, "%s: Failed to acquire HW lock\n", __func__);
			return -EINVAL;
		}
	};

	acp_mailbox_write(sdev, offset, msg->msg_data, msg->msg_size);
	acp_ipc_host_msg_set(sdev);

	/* Trigger host to dsp interrupt for the msg */
	acpbus_trigger_host_to_dsp_swintr(adata);

	/* Unlock or Release HW Semaphore */
	snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_AXI2DAGB_SEM_0, 0x0);

	return 0;
}
EXPORT_SYMBOL_NS(acp_sof_ipc_send_msg, SND_SOC_SOF_AMD_COMMON);
@@ -170,14 +184,6 @@ int acp_sof_ipc_msg_data(struct snd_sof_dev *sdev, struct snd_pcm_substream *sub
}
EXPORT_SYMBOL_NS(acp_sof_ipc_msg_data, SND_SOC_SOF_AMD_COMMON);

int acp_sof_ipc_pcm_params(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream,
			   const struct sof_ipc_pcm_params_reply *reply)
{
	/* TODO: Implement stream hw params to validate stream offset */
	return 0;
}
EXPORT_SYMBOL_NS(acp_sof_ipc_pcm_params, SND_SOC_SOF_AMD_COMMON);

int acp_sof_ipc_get_mailbox_offset(struct snd_sof_dev *sdev)
{
	return ACP_SCRATCH_MEMORY_ADDRESS;
+9 −0
Original line number Diff line number Diff line
@@ -127,6 +127,12 @@ static void configure_pte_for_fw_loading(int type, int num_pages, struct acp_dev
		return;
	}

	/* Group Enable */
	snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACPAXI2AXI_ATU_BASE_ADDR_GRP_1,
			  ACP_SRAM_PTE_OFFSET | BIT(31));
	snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1,
			  PAGE_SIZE_4K_ENABLE);

	for (page_idx = 0; page_idx < num_pages; page_idx++) {
		low = lower_32_bits(addr);
		high = upper_32_bits(addr);
@@ -136,6 +142,9 @@ static void configure_pte_for_fw_loading(int type, int num_pages, struct acp_dev
		offset += 8;
		addr += PAGE_SIZE;
	}

	/* Flush ATU Cache after PTE Update */
	snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACPAXI2AXI_ATU_CTRL, ACP_ATU_CACHE_INVALID);
}

/* pre fw run operations */
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