Commit 5dfdb0a0 authored by Roland Stigge's avatar Roland Stigge
Browse files

ARM: LPC32xx: clock.c cleanup 



This patch makes use of the default macro CLKDEV_INIT() for clock registration.

Signed-off-by: default avatarRoland Stigge <stigge@antcom.de>
parent 4de02e4a

arch/arm/mach-lpc32xx/clock.c

+35 −42
Original line number Diff line number Diff line
@@ -1095,49 +1095,42 @@ struct clk *clk_get_parent(struct clk *clk) 
}

EXPORT_SYMBOL(clk_get_parent);



#define _REGISTER_CLOCK(d, n, c) \

	{ \

		.dev_id = (d), \

		.con_id = (n), \

		.clk = &(c), \

	},



static struct clk_lookup lookups[] = {

	_REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)

	_REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)

	_REGISTER_CLOCK(NULL, "osc_main", osc_main)

	_REGISTER_CLOCK(NULL, "sys_ck", clk_sys)

	_REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)

	_REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)

	_REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)

	_REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)

	_REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)

	_REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)

	_REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)

	_REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)

	_REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)

	_REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)

	_REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)

	_REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)

	_REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)

	_REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)

	_REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)

	_REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)

	_REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)

	_REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)

	_REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)

	_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)

	_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)

	_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)

	_REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)

	_REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)

	_REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)

	_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)

	_REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)

	_REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)

	_REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)

	_REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)

	_REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)

	CLKDEV_INIT(NULL, "osc_32KHz", &osc_32KHz),

	CLKDEV_INIT(NULL, "osc_pll397", &osc_pll397),

	CLKDEV_INIT(NULL, "osc_main", &osc_main),

	CLKDEV_INIT(NULL, "sys_ck", &clk_sys),

	CLKDEV_INIT(NULL, "arm_pll_ck", &clk_armpll),

	CLKDEV_INIT(NULL, "ck_pll5", &clk_usbpll),

	CLKDEV_INIT(NULL, "hclk_ck", &clk_hclk),

	CLKDEV_INIT(NULL, "pclk_ck", &clk_pclk),

	CLKDEV_INIT(NULL, "timer0_ck", &clk_timer0),

	CLKDEV_INIT(NULL, "timer1_ck", &clk_timer1),

	CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2),

	CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3),

	CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),

	CLKDEV_INIT(NULL, "clk_dmac", &clk_dma),

	CLKDEV_INIT("pnx4008-watchdog", NULL, &clk_wdt),

	CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),

	CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),

	CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),

	CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6),

	CLKDEV_INIT("pnx-i2c.0", NULL, &clk_i2c0),

	CLKDEV_INIT("pnx-i2c.1", NULL, &clk_i2c1),

	CLKDEV_INIT("pnx-i2c.2", NULL, &clk_i2c2),

	CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),

	CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),

	CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan),

	CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand),

	CLKDEV_INIT("lpc32xx-adc", NULL, &clk_adc),

	CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0),

	CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1),

	CLKDEV_INIT("ts-lpc32xx", NULL, &clk_tsc),

	CLKDEV_INIT("dev:mmc0", NULL, &clk_mmc),

	CLKDEV_INIT("lpc-eth.0", NULL, &clk_net),

	CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),

	CLKDEV_INIT("lpc32xx_udc", "ck_usbd", &clk_usbd),

	CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),

};



static int __init clk_init(void)