Commit 5de24da1 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge tag 'mlx5-updates-2021-12-21' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 

Saeed Mahameed says:

====================
mlx5-updates-2021-12-21

1) From Shay Drory: Devlink user knobs to control device's EQ size

This series provides knobs which will enable users to
minimize memory consumption of mlx5 Functions (PF/VF/SF).
mlx5 exposes two new generic devlink params for EQ size
configuration and uses devlink generic param max_macs.

LINK: https://lore.kernel.org/netdev/20211208141722.13646-1-shayd@nvidia.com/

2) From Tariq and Lama, allocate software channel objects and statistics
  of a mlx5 netdevice private data dynamically upon first demand to save on
  memory.

* tag 'mlx5-updates-2021-12-21' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux:
  net/mlx5e: Take packet_merge params directly from the RX res struct
  net/mlx5e: Allocate per-channel stats dynamically at first usage
  net/mlx5e: Use dynamic per-channel allocations in stats
  net/mlx5e: Allow profile-specific limitation on max num of channels
  net/mlx5e: Save memory by using dynamic allocation in netdev priv
  net/mlx5e: Add profile indications for PTP and QOS HTB features
  net/mlx5e: Use bitmap field for profile features
  net/mlx5: Remove the repeated declaration
  net/mlx5: Let user configure max_macs generic param
  devlink: Clarifies max_macs generic devlink param
  net/mlx5: Let user configure event_eq_size param
  devlink: Add new "event_eq_size" generic device param
  net/mlx5: Let user configure io_eq_size param
  devlink: Add new "io_eq_size" generic device param
====================

Link: https://lore.kernel.org/r/20211222031604.14540-1-saeed@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents e6e59044 1f08917a

Documentation/networking/devlink/devlink-params.rst

+10 −2
Original line number Diff line number Diff line
@@ -118,8 +118,10 @@ own name. 
       errors.

   * - ``max_macs``

     - u32

     - Specifies the maximum number of MAC addresses per ethernet port of

       this device.

     - Typically macvlan, vlan net devices mac are also programmed in their

       parent netdevice's Function rx filter. This parameter limit the

       maximum number of unicast mac address filters to receive traffic from

       per ethernet port of this device.

   * - ``region_snapshot_enable``

     - Boolean

     - Enable capture of ``devlink-region`` snapshots.
@@ -129,3 +131,9 @@ own name. 
       will NACK any attempt of other host to reset the device. This parameter

       is useful for setups where a device is shared by different hosts, such

       as multi-host setup.

   * - ``io_eq_size``

     - u32

     - Control the size of I/O completion EQs.

   * - ``event_eq_size``

     - u32

     - Control the size of asynchronous control events EQ.

Documentation/networking/devlink/mlx5.rst

+10 −0
Original line number Diff line number Diff line
@@ -14,8 +14,18 @@ Parameters 


   * - Name

     - Mode

     - Validation

   * - ``enable_roce``

     - driverinit

   * - ``io_eq_size``

     - driverinit

     - The range is between 64 and 4096.

   * - ``event_eq_size``

     - driverinit

     - The range is between 64 and 4096.

   * - ``max_macs``

     - driverinit

     - The range is between 1 and 2^31. Only power of 2 values are supported.



The ``mlx5`` driver also implements the following driver-specific

parameters.

drivers/net/ethernet/mellanox/mlx5/core/devlink.c

+88 −0
Original line number Diff line number Diff line
@@ -546,6 +546,13 @@ static int mlx5_devlink_enable_remote_dev_reset_get(struct devlink *devlink, u32 
	return 0;

}



static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,

					  union devlink_param_value val,

					  struct netlink_ext_ack *extack)

{

	return (val.vu16 >= 64 && val.vu16 <= 4096) ? 0 : -EINVAL;

}



static const struct devlink_param mlx5_devlink_params[] = {

	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_FLOW_STEERING_MODE,

			     "flow_steering_mode", DEVLINK_PARAM_TYPE_STRING,
@@ -570,6 +577,10 @@ static const struct devlink_param mlx5_devlink_params[] = { 
	DEVLINK_PARAM_GENERIC(ENABLE_REMOTE_DEV_RESET, BIT(DEVLINK_PARAM_CMODE_RUNTIME),

			      mlx5_devlink_enable_remote_dev_reset_get,

			      mlx5_devlink_enable_remote_dev_reset_set, NULL),

	DEVLINK_PARAM_GENERIC(IO_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),

			      NULL, NULL, mlx5_devlink_eq_depth_validate),

	DEVLINK_PARAM_GENERIC(EVENT_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),

			      NULL, NULL, mlx5_devlink_eq_depth_validate),

};



static void mlx5_devlink_set_params_init_values(struct devlink *devlink)
@@ -608,6 +619,16 @@ static void mlx5_devlink_set_params_init_values(struct devlink *devlink) 
						   value);

	}

#endif



	value.vu32 = MLX5_COMP_EQ_SIZE;

	devlink_param_driverinit_value_set(devlink,

					   DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,

					   value);



	value.vu32 = MLX5_NUM_ASYNC_EQE;

	devlink_param_driverinit_value_set(devlink,

					   DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,

					   value);

}



static const struct devlink_param enable_eth_param =
@@ -752,6 +773,66 @@ static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink) 
	mlx5_devlink_eth_param_unregister(devlink);

}



static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,

					     union devlink_param_value val,

					     struct netlink_ext_ack *extack)

{

	struct mlx5_core_dev *dev = devlink_priv(devlink);



	if (val.vu32 == 0) {

		NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");

		return -EINVAL;

	}



	if (!is_power_of_2(val.vu32)) {

		NL_SET_ERR_MSG_MOD(extack, "Only power of 2 values are supported for max_macs");

		return -EINVAL;

	}



	if (ilog2(val.vu32) >

	    MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {

		NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");

		return -EINVAL;

	}



	return 0;

}



static const struct devlink_param max_uc_list_param =

	DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),

			      NULL, NULL, mlx5_devlink_max_uc_list_validate);



static int mlx5_devlink_max_uc_list_param_register(struct devlink *devlink)

{

	struct mlx5_core_dev *dev = devlink_priv(devlink);

	union devlink_param_value value;

	int err;



	if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))

		return 0;



	err = devlink_param_register(devlink, &max_uc_list_param);

	if (err)

		return err;



	value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);

	devlink_param_driverinit_value_set(devlink,

					   DEVLINK_PARAM_GENERIC_ID_MAX_MACS,

					   value);

	return 0;

}



static void

mlx5_devlink_max_uc_list_param_unregister(struct devlink *devlink)

{

	struct mlx5_core_dev *dev = devlink_priv(devlink);



	if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))

		return;



	devlink_param_unregister(devlink, &max_uc_list_param);

}



#define MLX5_TRAP_DROP(_id, _group_id)					\

	DEVLINK_TRAP_GENERIC(DROP, DROP, _id,				\

			     DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
@@ -811,6 +892,10 @@ int mlx5_devlink_register(struct devlink *devlink) 
	if (err)

		goto auxdev_reg_err;



	err = mlx5_devlink_max_uc_list_param_register(devlink);

	if (err)

		goto max_uc_list_err;



	err = mlx5_devlink_traps_register(devlink);

	if (err)

		goto traps_reg_err;
@@ -821,6 +906,8 @@ int mlx5_devlink_register(struct devlink *devlink) 
	return 0;



traps_reg_err:

	mlx5_devlink_max_uc_list_param_unregister(devlink);

max_uc_list_err:

	mlx5_devlink_auxdev_params_unregister(devlink);

auxdev_reg_err:

	devlink_params_unregister(devlink, mlx5_devlink_params,
@@ -831,6 +918,7 @@ int mlx5_devlink_register(struct devlink *devlink) 
void mlx5_devlink_unregister(struct devlink *devlink)

{

	mlx5_devlink_traps_unregister(devlink);

	mlx5_devlink_max_uc_list_param_unregister(devlink);

	mlx5_devlink_auxdev_params_unregister(devlink);

	devlink_params_unregister(devlink, mlx5_devlink_params,

				  ARRAY_SIZE(mlx5_devlink_params));

drivers/net/ethernet/mellanox/mlx5/core/en.h

+16 −10
Original line number Diff line number Diff line
@@ -145,7 +145,6 @@ struct page_pool; 


#define MLX5E_MIN_NUM_CHANNELS         0x1

#define MLX5E_MAX_NUM_CHANNELS         (MLX5E_INDIR_RQT_SIZE / 2)

#define MLX5E_MAX_NUM_SQS              (MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC)

#define MLX5E_TX_CQ_POLL_BUDGET        128

#define MLX5E_TX_XSK_POLL_BUDGET       64

#define MLX5E_SQ_RECOVER_MIN_INTERVAL  500 /* msecs */
@@ -875,10 +874,8 @@ struct mlx5e_trap; 


struct mlx5e_priv {

	/* priv data path fields - start */

	/* +1 for port ptp ts */

	struct mlx5e_txqsq *txq2sq[(MLX5E_MAX_NUM_CHANNELS + 1) * MLX5E_MAX_NUM_TC +

				   MLX5E_QOS_MAX_LEAF_NODES];

	int channel_tc2realtxq[MLX5E_MAX_NUM_CHANNELS][MLX5E_MAX_NUM_TC];

	struct mlx5e_txqsq **txq2sq;

	int **channel_tc2realtxq;

	int port_ptp_tc2realtxq[MLX5E_MAX_NUM_TC];

#ifdef CONFIG_MLX5_CORE_EN_DCB

	struct mlx5e_dcbx_dp       dcbx_dp;
@@ -893,7 +890,7 @@ struct mlx5e_priv { 
	struct mlx5e_channels      channels;

	u32                        tisn[MLX5_MAX_PORTS][MLX5E_MAX_NUM_TC];

	struct mlx5e_rx_res       *rx_res;

	u32                        tx_rates[MLX5E_MAX_NUM_SQS];

	u32                       *tx_rates;



	struct mlx5e_flow_steering fs;
@@ -909,7 +906,7 @@ struct mlx5e_priv { 
	struct net_device         *netdev;

	struct mlx5e_trap         *en_trap;

	struct mlx5e_stats         stats;

	struct mlx5e_channel_stats channel_stats[MLX5E_MAX_NUM_CHANNELS];

	struct mlx5e_channel_stats **channel_stats;

	struct mlx5e_channel_stats trap_stats;

	struct mlx5e_ptp_stats     ptp_stats;

	u16                        stats_nch;
@@ -956,6 +953,12 @@ struct mlx5e_rx_handlers { 


extern const struct mlx5e_rx_handlers mlx5e_rx_handlers_nic;



enum mlx5e_profile_feature {

	MLX5E_PROFILE_FEATURE_PTP_RX,

	MLX5E_PROFILE_FEATURE_PTP_TX,

	MLX5E_PROFILE_FEATURE_QOS_HTB,

};



struct mlx5e_profile {

	int	(*init)(struct mlx5_core_dev *mdev,

			struct net_device *netdev);
@@ -969,14 +972,18 @@ struct mlx5e_profile { 
	int	(*update_rx)(struct mlx5e_priv *priv);

	void	(*update_stats)(struct mlx5e_priv *priv);

	void	(*update_carrier)(struct mlx5e_priv *priv);

	int	(*max_nch_limit)(struct mlx5_core_dev *mdev);

	unsigned int (*stats_grps_num)(struct mlx5e_priv *priv);

	mlx5e_stats_grp_t *stats_grps;

	const struct mlx5e_rx_handlers *rx_handlers;

	int	max_tc;

	u8	rq_groups;

	bool	rx_ptp_support;

	u32     features;

};



#define mlx5e_profile_feature_cap(profile, feature)	\

	((profile)->features & (MLX5E_PROFILE_FEATURE_## feature))



void mlx5e_build_ptys2ethtool_map(void);



bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev);
@@ -1188,8 +1195,7 @@ int mlx5e_priv_init(struct mlx5e_priv *priv, 
		    struct mlx5_core_dev *mdev);

void mlx5e_priv_cleanup(struct mlx5e_priv *priv);

struct net_device *

mlx5e_create_netdev(struct mlx5_core_dev *mdev, const struct mlx5e_profile *profile,

		    unsigned int txqs, unsigned int rxqs);

mlx5e_create_netdev(struct mlx5_core_dev *mdev, const struct mlx5e_profile *profile);

int mlx5e_attach_netdev(struct mlx5e_priv *priv);

void mlx5e_detach_netdev(struct mlx5e_priv *priv);

void mlx5e_destroy_netdev(struct mlx5e_priv *priv);

drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ mlx5e_hv_vhca_fill_ring_stats(struct mlx5e_priv *priv, int ch, 
	struct mlx5e_channel_stats *stats;

	int tc;



	stats = &priv->channel_stats[ch];

	stats = priv->channel_stats[ch];

	data->rx_packets = stats->rq.packets;

	data->rx_bytes   = stats->rq.bytes;