Commit 5dcd3345 authored by Kent Russell's avatar Kent Russell Committed by Alex Deucher
Browse files

drm/radeon: Fix preferred typo 



Change "prefered" to "preferred"

Signed-off-by: default avatarKent Russell <kent.russell@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6d7d9c5a

drivers/gpu/drm/radeon/radeon.h

+1 −1
Original line number Diff line number Diff line
@@ -464,7 +464,7 @@ struct radeon_bo_list { 
	struct radeon_bo		*robj;

	struct ttm_validate_buffer	tv;

	uint64_t			gpu_offset;

	unsigned			prefered_domains;

	unsigned			preferred_domains;

	unsigned			allowed_domains;

	uint32_t			tiling_flags;

};

drivers/gpu/drm/radeon/radeon_cs.c

+4 −4
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) 
		     p->rdev->family == CHIP_RS880)) {



			/* TODO: is this still needed for NI+ ? */

			p->relocs[i].prefered_domains =

			p->relocs[i].preferred_domains =

				RADEON_GEM_DOMAIN_VRAM;



			p->relocs[i].allowed_domains =
@@ -148,14 +148,14 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) 
				return -EINVAL;

			}



			p->relocs[i].prefered_domains = domain;

			p->relocs[i].preferred_domains = domain;

			if (domain == RADEON_GEM_DOMAIN_VRAM)

				domain |= RADEON_GEM_DOMAIN_GTT;

			p->relocs[i].allowed_domains = domain;

		}



		if (radeon_ttm_tt_has_userptr(p->relocs[i].robj->tbo.ttm)) {

			uint32_t domain = p->relocs[i].prefered_domains;

			uint32_t domain = p->relocs[i].preferred_domains;

			if (!(domain & RADEON_GEM_DOMAIN_GTT)) {

				DRM_ERROR("Only RADEON_GEM_DOMAIN_GTT is "

					  "allowed for userptr BOs\n");
@@ -163,7 +163,7 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) 
			}

			need_mmap_lock = true;

			domain = RADEON_GEM_DOMAIN_GTT;

			p->relocs[i].prefered_domains = domain;

			p->relocs[i].preferred_domains = domain;

			p->relocs[i].allowed_domains = domain;

		}

drivers/gpu/drm/radeon/radeon_object.c

+1 −1
Original line number Diff line number Diff line
@@ -546,7 +546,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev, 
	list_for_each_entry(lobj, head, tv.head) {

		struct radeon_bo *bo = lobj->robj;

		if (!bo->pin_count) {

			u32 domain = lobj->prefered_domains;

			u32 domain = lobj->preferred_domains;

			u32 allowed = lobj->allowed_domains;

			u32 current_domain =

				radeon_mem_type_to_domain(bo->tbo.mem.mem_type);

drivers/gpu/drm/radeon/radeon_vm.c

+2 −2
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@ struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev, 


	/* add the vm page table to the list */

	list[0].robj = vm->page_directory;

	list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;

	list[0].preferred_domains = RADEON_GEM_DOMAIN_VRAM;

	list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;

	list[0].tv.bo = &vm->page_directory->tbo;

	list[0].tv.shared = true;
@@ -151,7 +151,7 @@ struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev, 
			continue;



		list[idx].robj = vm->page_tables[i].bo;

		list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;

		list[idx].preferred_domains = RADEON_GEM_DOMAIN_VRAM;

		list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;

		list[idx].tv.bo = &list[idx].robj->tbo;

		list[idx].tv.shared = true;