Commit 5d814b2c authored by Philipp Zabel's avatar Philipp Zabel
Browse files

dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml 



Convert the device tree bindings for the Amlogic audio memory arbiter
controller to YAML schema to allow participating in DT validation.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220407154338.4190674-1-p.zabel@pengutronix.de
parent edb9bd8f

Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt

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* Amlogic audio memory arbiter controller



The Amlogic Audio ARB is a simple device which enables or

disables the access of Audio FIFOs to DDR on AXG based SoC.



Required properties:

- compatible: 'amlogic,meson-axg-audio-arb' or

	      'amlogic,meson-sm1-audio-arb'

- reg: physical base address of the controller and length of memory

       mapped region.

- clocks: phandle to the fifo peripheral clock provided by the audio

	  clock controller.

- #reset-cells: must be 1.



Example on the A113 SoC:



arb: reset-controller@280 {

	compatible = "amlogic,meson-axg-audio-arb";

	reg = <0x0 0x280 0x0 0x4>;

	#reset-cells = <1>;

	clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;

};

Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2019 BayLibre, SAS

%YAML 1.2

---

$id: "http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Amlogic audio memory arbiter controller



maintainers:

  - Jerome Brunet <jbrunet@baylibre.com>



description: The Amlogic Audio ARB is a simple device which enables or disables

  the access of Audio FIFOs to DDR on AXG based SoC.



properties:

  compatible:

    enum:

      - amlogic,meson-axg-audio-arb

      - amlogic,meson-sm1-audio-arb



  reg:

    maxItems: 1



  clocks:

    maxItems: 1

    description: |

      phandle to the fifo peripheral clock provided by the audio clock

      controller.



  "#reset-cells":

    const: 1



required:

  - compatible

  - reg

  - clocks

  - "#reset-cells"



additionalProperties: false



examples:

  - |

    // on the A113 SoC:

    #include <dt-bindings/clock/axg-audio-clkc.h>

    bus {

        #address-cells = <2>;

        #size-cells = <2>;



        arb: reset-controller@280 {

            compatible = "amlogic,meson-axg-audio-arb";

            reg = <0x0 0x280 0x0 0x4>;

            #reset-cells = <1>;

            clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;

        };

    };