Commit 5d694266 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Disable mem low power for CM HW block on DCN3.1 



[WHY]
Currently causes visible flicker in some scenarios on OLED eDPs

Reviewed-by: default avatarHaonan Wang <haonan.wang2@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 253a5591

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -1013,7 +1013,7 @@ static const struct dc_debug_options debug_defaults_drv = { 
			.i2c = true,

			.dmcu = false, // This is previously known to cause hang on S3 cycles if enabled

			.dscl = true,

			.cm = true,

			.cm = false, // visible flicker on OLED eDPs

			.mpc = true,

			.optc = true,

			.vpg = true,