Commit 5cd06644 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Split intel_cpu_transcoder_get_m_n() into M1/N1 vs. M2/N2 variants 



As with intel_cpu_transcoder_set_m_n() let's split the readout
counterpart into explicit M1/N1 vs. M2/N2 variants as well.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-6-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent be0c94ee

drivers/gpu/drm/i915/display/g4x_dp.c

+7 −5
Original line number Diff line number Diff line
@@ -337,13 +337,15 @@ static void g4x_dp_get_m_n(struct intel_crtc_state *crtc_state) 
{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);



	if (crtc_state->has_pch_encoder)

	if (crtc_state->has_pch_encoder) {

		intel_pch_transcoder_get_m_n(crtc, &crtc_state->dp_m_n);

	else

		intel_cpu_transcoder_get_m_n(crtc, crtc_state->cpu_transcoder,

					     &crtc_state->dp_m_n,

	} else {

		intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

					       &crtc_state->dp_m_n);

		intel_cpu_transcoder_get_m2_n2(crtc, crtc_state->cpu_transcoder,

					       &crtc_state->dp_m2_n2);

	}

}



static void intel_dp_get_config(struct intel_encoder *encoder,

				struct intel_crtc_state *pipe_config)

drivers/gpu/drm/i915/display/intel_ddi.c

+6 −6
Original line number Diff line number Diff line
@@ -3362,8 +3362,9 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, 
		pipe_config->lane_count =

			((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;



		intel_cpu_transcoder_get_m_n(crtc, cpu_transcoder,

					     &pipe_config->dp_m_n,

		intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder,

					       &pipe_config->dp_m_n);

		intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder,

					       &pipe_config->dp_m2_n2);



		if (DISPLAY_VER(dev_priv) >= 11) {
@@ -3401,9 +3402,8 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, 
			pipe_config->mst_master_transcoder =

					REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);



		intel_cpu_transcoder_get_m_n(crtc, cpu_transcoder,

					     &pipe_config->dp_m_n,

					     &pipe_config->dp_m2_n2);

		intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder,

					       &pipe_config->dp_m_n);



		pipe_config->infoframes.enable |=

			intel_hdmi_infoframes_enabled(encoder, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

+19 −13
Original line number Diff line number Diff line
@@ -3877,29 +3877,35 @@ void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc, 
		      PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));

}



void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,

void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc,

				    enum transcoder transcoder,

				  struct intel_link_m_n *m_n,

				  struct intel_link_m_n *m2_n2)

				    struct intel_link_m_n *m_n)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum pipe pipe = crtc->pipe;



	if (DISPLAY_VER(dev_priv) >= 5) {

	if (DISPLAY_VER(dev_priv) >= 5)

		intel_get_m_n(dev_priv, m_n,

			      PIPE_DATA_M1(transcoder), PIPE_DATA_N1(transcoder),

			      PIPE_LINK_M1(transcoder), PIPE_LINK_N1(transcoder));



		if (m2_n2 && transcoder_has_m2_n2(dev_priv, transcoder)) {

			intel_get_m_n(dev_priv, m2_n2,

				      PIPE_DATA_M2(transcoder), PIPE_DATA_N2(transcoder),

				      PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder));

		}

	} else {

	else

		intel_get_m_n(dev_priv, m_n,

			      PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe),

			      PIPE_LINK_M_G4X(pipe), PIPE_LINK_N_G4X(pipe));

}



void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,

				    enum transcoder transcoder,

				    struct intel_link_m_n *m_n)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);



	if (!transcoder_has_m2_n2(dev_priv, transcoder))

		return;



	intel_get_m_n(dev_priv, m_n,

		      PIPE_DATA_M2(transcoder), PIPE_DATA_N2(transcoder),

		      PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder));

}



static void ilk_get_pfit_pos_size(struct intel_crtc_state *crtc_state,

drivers/gpu/drm/i915/display/intel_display.h

+6 −4
Original line number Diff line number Diff line
@@ -608,10 +608,12 @@ void intel_cpu_transcoder_set_m1_n1(const struct intel_crtc_state *crtc_state, 
				    const struct intel_link_m_n *m_n);

void intel_cpu_transcoder_set_m2_n2(const struct intel_crtc_state *crtc_state,

				    const struct intel_link_m_n *m_n);

void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,

void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc,

				    enum transcoder cpu_transcoder,

				  struct intel_link_m_n *m_n,

				  struct intel_link_m_n *m2_n2);

				    struct intel_link_m_n *m_n);

void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,

				    enum transcoder cpu_transcoder,

				    struct intel_link_m_n *m_n);

void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,

				  struct intel_link_m_n *m_n);

void i9xx_crtc_clock_get(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.c

+4 −4
Original line number Diff line number Diff line
@@ -386,8 +386,8 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state) 
	crtc_state->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>

				 FDI_DP_PORT_WIDTH_SHIFT) + 1;



	intel_cpu_transcoder_get_m_n(crtc, crtc_state->cpu_transcoder,

				     &crtc_state->fdi_m_n, NULL);

	intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

				       &crtc_state->fdi_m_n);



	if (HAS_PCH_IBX(dev_priv)) {

		/*
@@ -510,8 +510,8 @@ void lpt_pch_get_config(struct intel_crtc_state *crtc_state) 
	crtc_state->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>

				 FDI_DP_PORT_WIDTH_SHIFT) + 1;



	intel_cpu_transcoder_get_m_n(crtc, crtc_state->cpu_transcoder,

				     &crtc_state->fdi_m_n, NULL);

	intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

				       &crtc_state->fdi_m_n);



	crtc_state->hw.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv);

}