Commit 5c9fa16e authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: Remove PROT_SAO support 



ISA v3.1 does not support the SAO storage control attribute required to
implement PROT_SAO. PROT_SAO was used by specialised system software
(Lx86) that has been discontinued for about 7 years, and is not thought
to be used elsewhere, so removal should not cause problems.

We rather remove it than keep support for older processors, because
live migrating guest partitions to newer processors may not be possible
if SAO is in use (or worse allowed with silent races).

- PROT_SAO stays in the uapi header so code using it would still build.
- arch_validate_prot() is removed, the generic version rejects PROT_SAO
  so applications would get a failure at mmap() time.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
[mpe: Drop KVM change for the time being]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200703011958.1166620-3-npiggin@gmail.com
parent f4ac1774

arch/powerpc/include/asm/book3s/64/pgtable.h

+5 −3
Original line number Diff line number Diff line
@@ -20,9 +20,13 @@ 
#define _PAGE_RW		(_PAGE_READ | _PAGE_WRITE)

#define _PAGE_RWX		(_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)

#define _PAGE_PRIVILEGED	0x00008 /* kernel access only */

#define _PAGE_SAO		0x00010 /* Strong access order */



#define _PAGE_CACHE_CTL		0x00030 /* Bits for the folowing cache modes */

			/*	No bits set is normal cacheable memory */

			/*	0x00010 unused, is SAO bit on radix POWER9 */

#define _PAGE_NON_IDEMPOTENT	0x00020 /* non idempotent memory */

#define _PAGE_TOLERANT		0x00030 /* tolerant memory, cache inhibited */



#define _PAGE_DIRTY		0x00080 /* C: page changed */

#define _PAGE_ACCESSED		0x00100 /* R: page referenced */

/*
@@ -824,8 +828,6 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, 
	return hash__set_pte_at(mm, addr, ptep, pte, percpu);

}



#define _PAGE_CACHE_CTL	(_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)



#define pgprot_noncached pgprot_noncached

static inline pgprot_t pgprot_noncached(pgprot_t prot)

{

arch/powerpc/include/asm/cputable.h

+5 −5
Original line number Diff line number Diff line
@@ -191,7 +191,7 @@ static inline void cpu_feature_keys_init(void) { } 
#define CPU_FTR_SPURR			LONG_ASM_CONST(0x0000000001000000)

#define CPU_FTR_DSCR			LONG_ASM_CONST(0x0000000002000000)

#define CPU_FTR_VSX			LONG_ASM_CONST(0x0000000004000000)

#define CPU_FTR_SAO			LONG_ASM_CONST(0x0000000008000000)

// Free					LONG_ASM_CONST(0x0000000008000000)

#define CPU_FTR_CP_USE_DCBTZ		LONG_ASM_CONST(0x0000000010000000)

#define CPU_FTR_UNALIGNED_LD_STD	LONG_ASM_CONST(0x0000000020000000)

#define CPU_FTR_ASYM_SMT		LONG_ASM_CONST(0x0000000040000000)
@@ -435,7 +435,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \

	    CPU_FTR_DSCR | CPU_FTR_ASYM_SMT | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | \

	    CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR | CPU_FTR_DABRX )
@@ -444,7 +444,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \
@@ -455,7 +455,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
@@ -473,7 +473,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \

arch/powerpc/include/asm/mman.h

+4 −22
Original line number Diff line number Diff line
@@ -13,38 +13,20 @@ 
#include <linux/pkeys.h>

#include <asm/cpu_has_feature.h>



#ifdef CONFIG_PPC_MEM_KEYS

static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,

		unsigned long pkey)

{

#ifdef CONFIG_PPC_MEM_KEYS

	return (((prot & PROT_SAO) ? VM_SAO : 0) | pkey_to_vmflag_bits(pkey));

#else

	return ((prot & PROT_SAO) ? VM_SAO : 0);

#endif

	return pkey_to_vmflag_bits(pkey);

}

#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)



static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)

{

#ifdef CONFIG_PPC_MEM_KEYS

	return (vm_flags & VM_SAO) ?

		__pgprot(_PAGE_SAO | vmflag_to_pte_pkey_bits(vm_flags)) :

		__pgprot(0 | vmflag_to_pte_pkey_bits(vm_flags));

#else

	return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);

#endif

	return __pgprot(vmflag_to_pte_pkey_bits(vm_flags));

}

#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)



static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)

{

	if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))

		return false;

	if ((prot & PROT_SAO) && !cpu_has_feature(CPU_FTR_SAO))

		return false;

	return true;

}

#define arch_validate_prot arch_validate_prot

#endif



#endif /* CONFIG_PPC64 */

#endif	/* _ASM_POWERPC_MMAN_H */

arch/powerpc/include/asm/nohash/64/pgtable.h

+0 −2
Original line number Diff line number Diff line
@@ -82,8 +82,6 @@ 
 */

#include <asm/nohash/pte-book3e.h>



#define _PAGE_SAO	0



#define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))



/*

arch/powerpc/include/uapi/asm/mman.h

+1 −1
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ 
#include <asm-generic/mman-common.h>





#define PROT_SAO	0x10		/* Strong Access Ordering */

#define PROT_SAO	0x10		/* Unsupported since v5.9 */



#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */

#define MAP_NORESERVE   0x40            /* don't reserve swap pages */