Commit 5c9b969f authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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drm/tegra: gr2d: Add tiled PATBASE address register 



There are two PATBASE address registers, one for linear layout and other
for tiled. The driver's address registers list misses the tiled PATBASE
register.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 2c2a291d

drivers/gpu/drm/tegra/gr2d.c

+1 −0
Original line number Diff line number Diff line
@@ -177,6 +177,7 @@ static const u32 gr2d_addr_regs[] = { 
	GR2D_DSTC_BASE_ADDR,

	GR2D_SRCA_BASE_ADDR,

	GR2D_SRCB_BASE_ADDR,

	GR2D_PATBASE_ADDR,

	GR2D_SRC_BASE_ADDR_SB,

	GR2D_DSTA_BASE_ADDR_SB,

	GR2D_DSTB_BASE_ADDR_SB,

drivers/gpu/drm/tegra/gr2d.h

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#define GR2D_DSTC_BASE_ADDR		0x2d

#define GR2D_SRCA_BASE_ADDR		0x31

#define GR2D_SRCB_BASE_ADDR		0x32

#define GR2D_PATBASE_ADDR		0x47

#define GR2D_SRC_BASE_ADDR_SB		0x48

#define GR2D_DSTA_BASE_ADDR_SB		0x49

#define GR2D_DSTB_BASE_ADDR_SB		0x4a