Commit 5c4f0062 authored by Chester Lin's avatar Chester Lin Committed by Ulf Hansson
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mmc: sdhci-esdhc-imx: add NXP S32G2 support 



Support the SDHCI controller found on NXP S32G2 platform. The new flag
ESDHC_FLAG_SKIP_ERR004536 is used because the hardware erratum bit is not
applicable for S32G2.

Signed-off-by: default avatarChester Lin <clin@suse.com>
Link: https://lore.kernel.org/r/20211021071333.32485-3-clin@suse.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 12753e6b

drivers/mmc/host/sdhci-esdhc-imx.c

+15 −2
Original line number Diff line number Diff line
@@ -196,6 +196,9 @@ 
 */

#define ESDHC_FLAG_BROKEN_AUTO_CMD23	BIT(16)



/* ERR004536 is not applicable for the IP  */

#define ESDHC_FLAG_SKIP_ERR004536	BIT(17)



enum wp_types {

	ESDHC_WP_NONE,		/* no WP, neither controller nor gpio */

	ESDHC_WP_CONTROLLER,	/* mmc controller internal WP */
@@ -289,6 +292,13 @@ static const struct esdhc_soc_data usdhc_imx7d_data = { 
			| ESDHC_FLAG_BROKEN_AUTO_CMD23,

};



static struct esdhc_soc_data usdhc_s32g2_data = {

	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING

			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200

			| ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES

			| ESDHC_FLAG_SKIP_ERR004536,

};



static struct esdhc_soc_data usdhc_imx7ulp_data = {

	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING

			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
@@ -347,6 +357,7 @@ static const struct of_device_id imx_esdhc_dt_ids[] = { 
	{ .compatible = "fsl,imx7ulp-usdhc", .data = &usdhc_imx7ulp_data, },

	{ .compatible = "fsl,imx8qxp-usdhc", .data = &usdhc_imx8qxp_data, },

	{ .compatible = "fsl,imx8mm-usdhc", .data = &usdhc_imx8mm_data, },

	{ .compatible = "nxp,s32g2-usdhc", .data = &usdhc_s32g2_data, },

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, imx_esdhc_dt_ids);
@@ -1375,8 +1386,10 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host) 
		 * erratum ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL

		 * TO1.1, it's harmless for MX6SL

		 */

		if (!(imx_data->socdata->flags & ESDHC_FLAG_SKIP_ERR004536)) {

			writel(readl(host->ioaddr + 0x6c) & ~BIT(7),

				host->ioaddr + 0x6c);

		}



		/* disable DLL_CTRL delay line settings */

		writel(0x0, host->ioaddr + ESDHC_DLL_CTRL);