Commit 5c20a3a9 authored by Andrew Jones's avatar Andrew Jones Committed by Anup Patel
Browse files

RISC-V: Fix compilation without RISCV_ISA_ZICBOM 



riscv_cbom_block_size and riscv_init_cbom_blocksize() should always
be available and riscv_init_cbom_blocksize() should always be
invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This
is because disabling RISCV_ISA_ZICBOM means "don't use zicbom
instructions in the kernel" not "pretend there isn't zicbom, even
when there is". When zicbom is available, whether the kernel enables
its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests.
Ensure we can build KVM and that the block size is initialized even
when compiling without RISCV_ISA_ZICBOM.

Fixes: 8f7e001e ("RISC-V: Clean up the Zicbom block size probing")
Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 9abf2313

arch/riscv/include/asm/cacheflush.h

+0 −8
Original line number Diff line number Diff line
@@ -42,16 +42,8 @@ void flush_icache_mm(struct mm_struct *mm, bool local); 


#endif /* CONFIG_SMP */



/*

 * The T-Head CMO errata internally probe the CBOM block size, but otherwise

 * don't depend on Zicbom.

 */

extern unsigned int riscv_cbom_block_size;

#ifdef CONFIG_RISCV_ISA_ZICBOM

void riscv_init_cbom_blocksize(void);

#else

static inline void riscv_init_cbom_blocksize(void) { }

#endif



#ifdef CONFIG_RISCV_DMA_NONCOHERENT

void riscv_noncoherent_supported(void);

arch/riscv/mm/cacheflush.c

+38 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (C) 2017 SiFive

 */



#include <linux/of.h>

#include <asm/cacheflush.h>



#ifdef CONFIG_SMP
@@ -86,3 +87,40 @@ void flush_icache_pte(pte_t pte) 
		flush_icache_all();

}

#endif /* CONFIG_MMU */



unsigned int riscv_cbom_block_size;

EXPORT_SYMBOL_GPL(riscv_cbom_block_size);



void riscv_init_cbom_blocksize(void)

{

	struct device_node *node;

	unsigned long cbom_hartid;

	u32 val, probed_block_size;

	int ret;



	probed_block_size = 0;

	for_each_of_cpu_node(node) {

		unsigned long hartid;



		ret = riscv_of_processor_hartid(node, &hartid);

		if (ret)

			continue;



		/* set block-size for cbom extension if available */

		ret = of_property_read_u32(node, "riscv,cbom-block-size", &val);

		if (ret)

			continue;



		if (!probed_block_size) {

			probed_block_size = val;

			cbom_hartid = hartid;

		} else {

			if (probed_block_size != val)

				pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",

					cbom_hartid, hartid);

		}

	}



	if (probed_block_size)

		riscv_cbom_block_size = probed_block_size;

}

arch/riscv/mm/dma-noncoherent.c

+0 −41
Original line number Diff line number Diff line
@@ -8,13 +8,8 @@ 
#include <linux/dma-direct.h>

#include <linux/dma-map-ops.h>

#include <linux/mm.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <asm/cacheflush.h>



unsigned int riscv_cbom_block_size;

EXPORT_SYMBOL_GPL(riscv_cbom_block_size);



static bool noncoherent_supported;



void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
@@ -77,42 +72,6 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 
	dev->dma_coherent = coherent;

}



#ifdef CONFIG_RISCV_ISA_ZICBOM

void riscv_init_cbom_blocksize(void)

{

	struct device_node *node;

	unsigned long cbom_hartid;

	u32 val, probed_block_size;

	int ret;



	probed_block_size = 0;

	for_each_of_cpu_node(node) {

		unsigned long hartid;



		ret = riscv_of_processor_hartid(node, &hartid);

		if (ret)

			continue;



		/* set block-size for cbom extension if available */

		ret = of_property_read_u32(node, "riscv,cbom-block-size", &val);

		if (ret)

			continue;



		if (!probed_block_size) {

			probed_block_size = val;

			cbom_hartid = hartid;

		} else {

			if (probed_block_size != val)

				pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",

					cbom_hartid, hartid);

		}

	}



	if (probed_block_size)

		riscv_cbom_block_size = probed_block_size;

}

#endif



void riscv_noncoherent_supported(void)

{

	WARN(!riscv_cbom_block_size,