Loading drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c +3 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,9 @@ nve0_fifo_runlist_update(struct nve0_fifo_priv *priv, u32 engine) nv_wr32(priv, 0x002270, cur->addr >> 12); nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3)); if (!nv_wait(priv, 0x002284 + (engine * 8), 0x00100000, 0x00000000)) if (wait_event_timeout(engn->wait, !(nv_rd32(priv, 0x002284 + (engine * 0x08)) & 0x00100000), msecs_to_jiffies(2000)) == 0) nv_error(priv, "runlist %d update timeout\n", engine); mutex_unlock(&nv_subdev(priv)->mutex); } Loading Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c +3 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,9 @@ nve0_fifo_runlist_update(struct nve0_fifo_priv *priv, u32 engine) nv_wr32(priv, 0x002270, cur->addr >> 12); nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3)); if (!nv_wait(priv, 0x002284 + (engine * 8), 0x00100000, 0x00000000)) if (wait_event_timeout(engn->wait, !(nv_rd32(priv, 0x002284 + (engine * 0x08)) & 0x00100000), msecs_to_jiffies(2000)) == 0) nv_error(priv, "runlist %d update timeout\n", engine); mutex_unlock(&nv_subdev(priv)->mutex); } Loading