Commit 5bd8d53f authored by Victor Zhao's avatar Victor Zhao Committed by Alex Deucher
Browse files

drm/amdgpu: add debugfs amdgpu_reset_level 



Introduce amdgpu_reset_level debugfs in order to help debug and
test specific type of reset. Also helps blocking unwanted type of
resets.

By default, mode2 reset will not be enabled

v2: make this debugfs in adev and use debugfs_create_u32

Signed-off-by: default avatarVictor Zhao <Victor.Zhao@amd.com>
Acked-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dac6b808

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+5 −0
Original line number Diff line number Diff line
@@ -274,6 +274,9 @@ extern int amdgpu_vcnfw_log; 
#define AMDGPU_RESET_VCE			(1 << 13)

#define AMDGPU_RESET_VCE1			(1 << 14)



#define AMDGPU_RESET_LEVEL_SOFT_RECOVERY (1 << 0)

#define AMDGPU_RESET_LEVEL_MODE2 (1 << 1)



/* max cursor sizes (in pixels) */

#define CIK_CURSOR_WIDTH 128

#define CIK_CURSOR_HEIGHT 128
@@ -1060,6 +1063,8 @@ struct amdgpu_device { 
	uint32_t                        scpm_status;



	struct work_struct		reset_work;



	uint32_t						amdgpu_reset_level_mask;

};



static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

+2 −0
Original line number Diff line number Diff line
@@ -1786,6 +1786,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev) 
		return PTR_ERR(ent);

	}



	debugfs_create_u32("amdgpu_reset_level", 0600, root, &adev->amdgpu_reset_level_mask);



	/* Register debugfs entries for amdgpu_ttm */

	amdgpu_ttm_debugfs_init(adev);

	amdgpu_debugfs_pm_init(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c

+8 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ int amdgpu_reset_init(struct amdgpu_device *adev) 
{

	int ret = 0;



	adev->amdgpu_reset_level_mask = 0x1;



	switch (adev->ip_versions[MP1_HWIP][0]) {

	case IP_VERSION(13, 0, 2):

		ret = aldebaran_reset_init(adev);
@@ -74,6 +76,9 @@ int amdgpu_reset_prepare_hwcontext(struct amdgpu_device *adev, 
{

	struct amdgpu_reset_handler *reset_handler = NULL;



	if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2))

		return -ENOSYS;



	if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))

		return -ENOSYS;
@@ -93,6 +98,9 @@ int amdgpu_reset_perform_reset(struct amdgpu_device *adev, 
	int ret;

	struct amdgpu_reset_handler *reset_handler = NULL;



	if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2))

		return -ENOSYS;



	if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))

		return -ENOSYS;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

+3 −0
Original line number Diff line number Diff line
@@ -405,6 +405,9 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, 
{

	ktime_t deadline = ktime_add_us(ktime_get(), 10000);



	if (!(ring->adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_SOFT_RECOVERY))

		return false;



	if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)

		return false;