Commit 5bb27917 authored by Mirela Rabulea's avatar Mirela Rabulea Committed by Shawn Guo
Browse files

arm64: dts: imx8: Add jpeg encoder/decoder nodes 



Add dts for imaging subsytem, include jpeg nodes here.
Tested on imx8qxp/qm.

Signed-off-by: default avatarMirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent d6ce0bfa

arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi

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// SPDX-License-Identifier: GPL-2.0+

/*

 * Copyright 2019-2021 NXP

 * Zhou Guoniu <guoniu.zhou@nxp.com>

 */

img_subsys: bus@58000000 {

	compatible = "simple-bus";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0x58000000 0x0 0x58000000 0x1000000>;



	img_ipg_clk: clock-img-ipg {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <200000000>;

		clock-output-names = "img_ipg_clk";

	};



	jpegdec: jpegdec@58400000 {

		reg = <0x58400000 0x00050000>;

		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,

			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;

		clock-names = "per", "ipg";

		assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,

				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;

		assigned-clock-rates = <200000000>, <200000000>;

		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,

				<&pd IMX_SC_R_MJPEG_DEC_S0>,

				<&pd IMX_SC_R_MJPEG_DEC_S1>,

				<&pd IMX_SC_R_MJPEG_DEC_S2>,

				<&pd IMX_SC_R_MJPEG_DEC_S3>;

	};



	jpegenc: jpegenc@58450000 {

		reg = <0x58450000 0x00050000>;

		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,

			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;

		clock-names = "per", "ipg";

		assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,

				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;

		assigned-clock-rates = <200000000>, <200000000>;

		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,

				<&pd IMX_SC_R_MJPEG_ENC_S0>,

				<&pd IMX_SC_R_MJPEG_ENC_S1>,

				<&pd IMX_SC_R_MJPEG_ENC_S2>,

				<&pd IMX_SC_R_MJPEG_ENC_S3>;

	};



	img_jpeg_dec_lpcg: clock-controller@585d0000 {

		compatible = "fsl,imx8qxp-lpcg";

		reg = <0x585d0000 0x10000>;

		#clock-cells = <1>;

		clocks = <&img_ipg_clk>, <&img_ipg_clk>;

		clock-indices = <IMX_LPCG_CLK_0>,

				<IMX_LPCG_CLK_4>;

		clock-output-names = "img_jpeg_dec_lpcg_clk",

				     "img_jpeg_dec_lpcg_ipg_clk";

		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>;

	};



	img_jpeg_enc_lpcg: clock-controller@585f0000 {

		compatible = "fsl,imx8qxp-lpcg";

		reg = <0x585f0000 0x10000>;

		#clock-cells = <1>;

		clocks = <&img_ipg_clk>, <&img_ipg_clk>;

		clock-indices = <IMX_LPCG_CLK_0>,

				<IMX_LPCG_CLK_4>;

		clock-output-names = "img_jpeg_enc_lpcg_clk",

				     "img_jpeg_enc_lpcg_ipg_clk";

		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>;

	};

};

arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi

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// SPDX-License-Identifier: GPL-2.0+

/*

 * Copyright 2021 NXP

 */



&jpegdec {

	compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec";

};



&jpegenc {

	compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc";

};

arch/arm64/boot/dts/freescale/imx8qm.dtsi

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@@ -166,11 +166,13 @@ 
	};



	/* sorted in register address */

	#include "imx8-ss-img.dtsi"

	#include "imx8-ss-dma.dtsi"

	#include "imx8-ss-conn.dtsi"

	#include "imx8-ss-lsio.dtsi"

};



#include "imx8qm-ss-img.dtsi"

#include "imx8qm-ss-dma.dtsi"

#include "imx8qm-ss-conn.dtsi"

#include "imx8qm-ss-lsio.dtsi"

arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi

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// SPDX-License-Identifier: GPL-2.0+

/*

 * Copyright 2021 NXP

 *	Dong Aisheng <aisheng.dong@nxp.com>

 */



&jpegdec {

	compatible = "nxp,imx8qxp-jpgdec";

};



&jpegenc {

	compatible = "nxp,imx8qxp-jpgenc";

};

arch/arm64/boot/dts/freescale/imx8qxp.dtsi

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@@ -258,12 +258,14 @@ 
	};



	/* sorted in register address */

	#include "imx8-ss-img.dtsi"

	#include "imx8-ss-adma.dtsi"

	#include "imx8-ss-conn.dtsi"

	#include "imx8-ss-ddr.dtsi"

	#include "imx8-ss-lsio.dtsi"

};



#include "imx8qxp-ss-img.dtsi"

#include "imx8qxp-ss-adma.dtsi"

#include "imx8qxp-ss-conn.dtsi"

#include "imx8qxp-ss-lsio.dtsi"