Commit 5b81a87d authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo
Browse files

arm64: dts: imx8m: Document the fuse address calculation 



The mapping from OCOTP reg DT property to Fusemap Descriptions Table in
the datasheet is often unclear. Add a comment to make it easier to find
out how it works. No functional change.

Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent ee0d68f2

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+16 −3
Original line number Diff line number Diff line
@@ -563,15 +563,28 @@ 
				#address-cells = <1>;

				#size-cells = <1>;



				imx8mm_uid: unique-id@4 {

				/*

				 * The register address below maps to the MX8M

				 * Fusemap Description Table entries this way.

				 * Assuming

				 *   reg = <ADDR SIZE>;

				 * then

				 *   Fuse Address = (ADDR * 4) + 0x400

				 * Note that if SIZE is greater than 4, then

				 * each subsequent fuse is located at offset

				 * +0x10 in Fusemap Description Table (e.g.

				 * reg = <0x4 0x8> describes fuses 0x410 and

				 * 0x420).

				 */

				imx8mm_uid: unique-id@4 { /* 0x410-0x420 */

					reg = <0x4 0x8>;

				};



				cpu_speed_grade: speed-grade@10 {

				cpu_speed_grade: speed-grade@10 { /* 0x440 */

					reg = <0x10 4>;

				};



				fec_mac_address: mac-address@90 {

				fec_mac_address: mac-address@90 { /* 0x640 */

					reg = <0x90 6>;

				};

			};

arch/arm64/boot/dts/freescale/imx8mn.dtsi

+16 −3
Original line number Diff line number Diff line
@@ -564,15 +564,28 @@ 
				#address-cells = <1>;

				#size-cells = <1>;



				imx8mn_uid: unique-id@4 {

				/*

				 * The register address below maps to the MX8M

				 * Fusemap Description Table entries this way.

				 * Assuming

				 *   reg = <ADDR SIZE>;

				 * then

				 *   Fuse Address = (ADDR * 4) + 0x400

				 * Note that if SIZE is greater than 4, then

				 * each subsequent fuse is located at offset

				 * +0x10 in Fusemap Description Table (e.g.

				 * reg = <0x4 0x8> describes fuses 0x410 and

				 * 0x420).

				 */

				imx8mn_uid: unique-id@4 { /* 0x410-0x420 */

					reg = <0x4 0x8>;

				};



				cpu_speed_grade: speed-grade@10 {

				cpu_speed_grade: speed-grade@10 { /* 0x440 */

					reg = <0x10 4>;

				};



				fec_mac_address: mac-address@90 {

				fec_mac_address: mac-address@90 { /* 0x640 */

					reg = <0x90 6>;

				};

			};

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+17 −4
Original line number Diff line number Diff line
@@ -425,19 +425,32 @@ 
				#address-cells = <1>;

				#size-cells = <1>;



				imx8mp_uid: unique-id@8 {

				/*

				 * The register address below maps to the MX8M

				 * Fusemap Description Table entries this way.

				 * Assuming

				 *   reg = <ADDR SIZE>;

				 * then

				 *   Fuse Address = (ADDR * 4) + 0x400

				 * Note that if SIZE is greater than 4, then

				 * each subsequent fuse is located at offset

				 * +0x10 in Fusemap Description Table (e.g.

				 * reg = <0x8 0x8> describes fuses 0x420 and

				 * 0x430).

				 */

				imx8mp_uid: unique-id@8 { /* 0x420-0x430 */

					reg = <0x8 0x8>;

				};



				cpu_speed_grade: speed-grade@10 {

				cpu_speed_grade: speed-grade@10 { /* 0x440 */

					reg = <0x10 4>;

				};



				eth_mac1: mac-address@90 {

				eth_mac1: mac-address@90 { /* 0x640 */

					reg = <0x90 6>;

				};



				eth_mac2: mac-address@96 {

				eth_mac2: mac-address@96 { /* 0x658 */

					reg = <0x96 6>;

				};

			};

arch/arm64/boot/dts/freescale/imx8mq.dtsi

+16 −3
Original line number Diff line number Diff line
@@ -593,15 +593,28 @@ 
				#address-cells = <1>;

				#size-cells = <1>;



				imx8mq_uid: soc-uid@4 {

				/*

				 * The register address below maps to the MX8M

				 * Fusemap Description Table entries this way.

				 * Assuming

				 *   reg = <ADDR SIZE>;

				 * then

				 *   Fuse Address = (ADDR * 4) + 0x400

				 * Note that if SIZE is greater than 4, then

				 * each subsequent fuse is located at offset

				 * +0x10 in Fusemap Description Table (e.g.

				 * reg = <0x4 0x8> describes fuses 0x410 and

				 * 0x420).

				 */

				imx8mq_uid: soc-uid@4 { /* 0x410-0x420 */

					reg = <0x4 0x8>;

				};



				cpu_speed_grade: speed-grade@10 {

				cpu_speed_grade: speed-grade@10 { /* 0x440 */

					reg = <0x10 4>;

				};



				fec_mac_address: mac-address@90 {

				fec_mac_address: mac-address@90 { /* 0x640 */

					reg = <0x90 6>;

				};

			};