Commit 5b7e5831 authored by Alexandre Torgue's avatar Alexandre Torgue
Browse files

ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) 



Add a "secure" version based on SCMI of STM32 boards. Only boards
provided by STMicroelectronics are concerned:

-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1

Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
parent 8e14ebb1

arch/arm/boot/dts/Makefile

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@@ -1163,6 +1163,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ 
	stm32mp157a-avenger96.dtb \

	stm32mp157a-dhcor-avenger96.dtb \

	stm32mp157a-dk1.dtb \

	stm32mp157a-dk1-scmi.dtb \

	stm32mp157a-iot-box.dtb \

	stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \

	stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
@@ -1173,9 +1174,12 @@ dtb-$(CONFIG_ARCH_STM32) += \ 
	stm32mp157c-dhcom-pdk2.dtb \

	stm32mp157c-dhcom-picoitx.dtb \

	stm32mp157c-dk2.dtb \

	stm32mp157c-dk2-scmi.dtb \

	stm32mp157c-ed1.dtb \

	stm32mp157c-ed1-scmi.dtb \

	stm32mp157c-emsbc-argon.dtb \

	stm32mp157c-ev1.dtb \

	stm32mp157c-ev1-scmi.dtb \

	stm32mp157c-lxa-mc1.dtb \

	stm32mp157c-odyssey.dtb

dtb-$(CONFIG_MACH_SUN4I) += \

arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/*

 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved

 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */



/dts-v1/;



#include "stm32mp157a-dk1.dts"



/ {

	model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";

	compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";



	reserved-memory {

		optee@de000000 {

			reg = <0xde000000 0x2000000>;

			no-map;

		};

	};

};



&cpu0 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cpu1 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&gpioz {

	clocks = <&scmi_clk CK_SCMI_GPIOZ>;

};



&hash1 {

	clocks = <&scmi_clk CK_SCMI_HASH1>;

	resets = <&scmi_reset RST_SCMI_HASH1>;

};



&i2c4 {

	clocks = <&scmi_clk CK_SCMI_I2C4>;

	resets = <&scmi_reset RST_SCMI_I2C4>;

};



&iwdg2 {

	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;

};



&mdma1 {

	resets = <&scmi_reset RST_SCMI_MDMA>;

};



&mlahb {

	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";

	clocks = <&scmi_clk CK_SCMI_HSE>,

		 <&scmi_clk CK_SCMI_HSI>,

		 <&scmi_clk CK_SCMI_CSI>,

		 <&scmi_clk CK_SCMI_LSE>,

		 <&scmi_clk CK_SCMI_LSI>;

};



&rng1 {

	clocks = <&scmi_clk CK_SCMI_RNG1>;

	resets = <&scmi_reset RST_SCMI_RNG1>;

};



&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};



&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};

arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/*

 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved

 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */



/dts-v1/;



#include "stm32mp157c-dk2.dts"



/ {

	model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";

	compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";



	reserved-memory {

		optee@de000000 {

			reg = <0xde000000 0x2000000>;

			no-map;

		};

	};

};



&cpu0 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cpu1 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cryp1 {

	clocks = <&scmi_clk CK_SCMI_CRYP1>;

	resets = <&scmi_reset RST_SCMI_CRYP1>;

};



&dsi {

	clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;

};



&gpioz {

	clocks = <&scmi_clk CK_SCMI_GPIOZ>;

};



&hash1 {

	clocks = <&scmi_clk CK_SCMI_HASH1>;

	resets = <&scmi_reset RST_SCMI_HASH1>;

};



&i2c4 {

	clocks = <&scmi_clk CK_SCMI_I2C4>;

	resets = <&scmi_reset RST_SCMI_I2C4>;

};



&iwdg2 {

	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;

};



&mdma1 {

	resets = <&scmi_reset RST_SCMI_MDMA>;

};



&mlahb {

	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";

	clocks = <&scmi_clk CK_SCMI_HSE>,

		 <&scmi_clk CK_SCMI_HSI>,

		 <&scmi_clk CK_SCMI_CSI>,

		 <&scmi_clk CK_SCMI_LSE>,

		 <&scmi_clk CK_SCMI_LSI>;

};



&rng1 {

	clocks = <&scmi_clk CK_SCMI_RNG1>;

	resets = <&scmi_reset RST_SCMI_RNG1>;

};



&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};



&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};

arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/*

 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved

 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */



/dts-v1/;



#include "stm32mp157c-ed1.dts"



/ {

	model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";

	compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";



	reserved-memory {

		optee@fe000000 {

			reg = <0xfe000000 0x2000000>;

			no-map;

		};

	};

};



&cpu0 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cpu1 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cryp1 {

	clocks = <&scmi_clk CK_SCMI_CRYP1>;

	resets = <&scmi_reset RST_SCMI_CRYP1>;

};



&gpioz {

	clocks = <&scmi_clk CK_SCMI_GPIOZ>;

};



&hash1 {

	clocks = <&scmi_clk CK_SCMI_HASH1>;

	resets = <&scmi_reset RST_SCMI_HASH1>;

};



&i2c4 {

	clocks = <&scmi_clk CK_SCMI_I2C4>;

	resets = <&scmi_reset RST_SCMI_I2C4>;

};



&iwdg2 {

	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;

};



&mdma1 {

	resets = <&scmi_reset RST_SCMI_MDMA>;

};



&mlahb {

	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";

	clocks = <&scmi_clk CK_SCMI_HSE>,

		 <&scmi_clk CK_SCMI_HSI>,

		 <&scmi_clk CK_SCMI_CSI>,

		 <&scmi_clk CK_SCMI_LSE>,

		 <&scmi_clk CK_SCMI_LSI>;

};



&rng1 {

	clocks = <&scmi_clk CK_SCMI_RNG1>;

	resets = <&scmi_reset RST_SCMI_RNG1>;

};



&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};



&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};

arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/*

 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved

 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */



/dts-v1/;



#include "stm32mp157c-ev1.dts"



/ {

	model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";

	compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",

		     "st,stm32mp157";



	reserved-memory {

		optee@fe000000 {

			reg = <0xfe000000 0x2000000>;

			no-map;

		};

	};

};



&cpu0 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cpu1 {

	clocks = <&scmi_clk CK_SCMI_MPU>;

};



&cryp1 {

	clocks = <&scmi_clk CK_SCMI_CRYP1>;

	resets = <&scmi_reset RST_SCMI_CRYP1>;

};



&dsi {

	clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;

};



&gpioz {

	clocks = <&scmi_clk CK_SCMI_GPIOZ>;

};



&hash1 {

	clocks = <&scmi_clk CK_SCMI_HASH1>;

	resets = <&scmi_reset RST_SCMI_HASH1>;

};



&i2c4 {

	clocks = <&scmi_clk CK_SCMI_I2C4>;

	resets = <&scmi_reset RST_SCMI_I2C4>;

};



&iwdg2 {

	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;

};



&m_can1 {

	clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;

};



&mdma1 {

	resets = <&scmi_reset RST_SCMI_MDMA>;

};



&mlahb {

	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";

	clocks = <&scmi_clk CK_SCMI_HSE>,

		 <&scmi_clk CK_SCMI_HSI>,

		 <&scmi_clk CK_SCMI_CSI>,

		 <&scmi_clk CK_SCMI_LSE>,

		 <&scmi_clk CK_SCMI_LSI>;

};



&rng1 {

	clocks = <&scmi_clk CK_SCMI_RNG1>;

	resets = <&scmi_reset RST_SCMI_RNG1>;

};



&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};



&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};