Commit 5b667ffb authored by Luo Jiaxing's avatar Luo Jiaxing Committed by Zheng Zengkai
Browse files

scsi: hisi_sas: Warn in v3 hw channel interrupt handler when status reg cleared 

mainline inclusion
from mainline-master
commit 2d31cb20
category: bugfix
bugzilla: 175270
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2d31cb20a3cd611a9a544f9586eb3908ee2085cf

------------------------------------------------------------------------

If a channel interrupt occurs without any status bit set, the handler will
return directly. However, if such redundant interrupts are received, it's
better to check what happen, so add logs for this.

Link: https://lore.kernel.org/r/1617709711-195853-6-git-send-email-john.garry@huawei.com


Signed-off-by: default avatarLuo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: default avatarYihang Li <liyihang6@hisilicon.com>
Signed-off-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
Reviewed-by: default avatarOuyangdelong <ouyangdelong@huawei.com>
Signed-off-by: default avatarNifujia <nifujia1@hisilicon.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 012b768b

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

+8 −2
Original line number Diff line number Diff line
@@ -1718,8 +1718,11 @@ static void handle_chl_int1_v3_hw(struct hisi_hba *hisi_hba, int phy_no) 
	int i;



	irq_value &= ~irq_msk;

	if (!irq_value)

	if (!irq_value) {

		dev_warn(dev, "phy%d channel int 1 received with status bits cleared\n",

			 phy_no);

		return;

	}



	for (i = 0; i < ARRAY_SIZE(port_axi_error); i++) {

		const struct hisi_sas_hw_error *error = &port_axi_error[i];
@@ -1780,8 +1783,11 @@ static void handle_chl_int2_v3_hw(struct hisi_hba *hisi_hba, int phy_no) 
			BIT(CHL_INT2_RX_INVLD_DW_OFF);



	irq_value &= ~irq_msk;

	if (!irq_value)

	if (!irq_value) {

		dev_warn(dev, "phy%d channel int 2 received with status bits cleared\n",

			 phy_no);

		return;

	}



	if (irq_value & BIT(CHL_INT2_SL_IDAF_TOUT_CONF_OFF)) {

		dev_warn(dev, "phy%d identify timeout\n", phy_no);