Commit 5ae45114 authored by Sam Protsenko's avatar Sam Protsenko Committed by Wolfram Sang
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dt-bindings: i2c: exynos5: Convert to dtschema 

Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.

Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
   unable to get the clock)
2. Removed properties and descriptions that can be found in
   schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema

[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml



Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent 92ae3162

Documentation/devicetree/bindings/i2c/i2c-exynos5.txt

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* Samsung's High Speed I2C controller



The Samsung's High Speed I2C controller is used to interface with I2C devices

at various speeds ranging from 100khz to 3.4Mhz.



Required properties:

  - compatible: value should be.

	-> "samsung,exynos5-hsi2c", (DEPRECATED)

				for i2c compatible with HSI2C available

				on Exynos5250 and Exynos5420 SoCs.

	-> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available

				on Exynos5250 and Exynos5420 SoCs.

	-> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available

				on Exynos5260 SoCs.

	-> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available

				on Exynos7 SoCs.



  - reg: physical base address of the controller and length of memory mapped

    region.

  - interrupts: interrupt number to the cpu.

  - #address-cells: always 1 (for i2c addresses)

  - #size-cells: always 0



  - Pinctrl:

    - pinctrl-0: Pin control group to be used for this controller.

    - pinctrl-names: Should contain only one value - "default".



Optional properties:

  - clock-frequency: Desired operating frequency in Hz of the bus.

    -> If not specified, the bus operates in fast-speed mode at

       at 100khz.

    -> If specified, the bus operates in high-speed mode only if the

       clock-frequency is >= 1Mhz.



Example:



hsi2c@12ca0000 {

	compatible = "samsung,exynos5250-hsi2c";

	reg = <0x12ca0000 0x100>;

	interrupts = <56>;

	clock-frequency = <100000>;



	pinctrl-0 = <&i2c4_bus>;

	pinctrl-names = "default";



	#address-cells = <1>;

	#size-cells = <0>;



	s2mps11_pmic@66 {

		compatible = "samsung,s2mps11-pmic";

		reg = <0x66>;

	};

};

Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Samsung's High Speed I2C controller



maintainers:

  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>



description: |

  The Samsung's High Speed I2C controller is used to interface with I2C devices

  at various speeds ranging from 100kHz to 3.4MHz.



allOf:

  - $ref: /schemas/i2c/i2c-controller.yaml#



properties:

  compatible:

    oneOf:

      - enum:

          - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420

          - samsung,exynos5260-hsi2c    # Exynos5260

          - samsung,exynos7-hsi2c       # Exynos7

      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420

        deprecated: true



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clock-frequency:

    default: 100000

    description:

      Desired operating frequency in Hz of the bus.



      If not specified, the bus operates in fast-speed mode at 100kHz.



      If specified, the bus operates in high-speed mode only if the

      clock-frequency is >= 1MHz.



  clocks:

    maxItems: 1

    description: I2C operating clock



  clock-names:

    const: hsi2c



required:

  - compatible

  - reg

  - interrupts

  - clocks



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/exynos5420.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>



    hsi2c_8: i2c@12e00000 {

        compatible = "samsung,exynos5250-hsi2c";

        reg = <0x12e00000 0x1000>;

        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

        #address-cells = <1>;

        #size-cells = <0>;

        clock-frequency = <100000>;

        clocks = <&clock CLK_USI4>;

        clock-names = "hsi2c";



        pmic@66 {

            /* compatible = "samsung,s2mps11-pmic"; */

            reg = <0x66>;

        };

    };