Commit 5a712701 authored by Dave Jiang's avatar Dave Jiang Committed by Vinod Koul
Browse files

dmaengine: idxd: Update calculation of group offset to be more readable 



Create helper macros to make group offset calculation more readable.

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 4749f51d

drivers/dma/idxd/device.c

+5 −7
Original line number Original line Diff line number Diff line
@@ -543,24 +543,22 @@ static void idxd_group_config_write(struct idxd_group *group) 
	dev_dbg(dev, "Writing group %d cfg registers\n", group->id);

	dev_dbg(dev, "Writing group %d cfg registers\n", group->id);





	/* setup GRPWQCFG */

	/* setup GRPWQCFG */

	for (i = 0; i < 4; i++) {

	for (i = 0; i < GRPWQCFG_STRIDES; i++) {

		grpcfg_offset = idxd->grpcfg_offset +

		grpcfg_offset = GRPWQCFG_OFFSET(idxd, group->id, i);

			group->id * 64 + i * sizeof(u64);

		iowrite64(group->grpcfg.wqs[i], idxd->reg_base + grpcfg_offset);

		iowrite64(group->grpcfg.wqs[i],

			  idxd->reg_base + grpcfg_offset);

		dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n",

		dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n",

			group->id, i, grpcfg_offset,

			group->id, i, grpcfg_offset,

			ioread64(idxd->reg_base + grpcfg_offset));

			ioread64(idxd->reg_base + grpcfg_offset));

	}

	}





	/* setup GRPENGCFG */

	/* setup GRPENGCFG */

	grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 32;

	grpcfg_offset = GRPENGCFG_OFFSET(idxd, group->id);

	iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset);

	iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset);

	dev_dbg(dev, "GRPCFG engs[%d: %#x]: %#llx\n", group->id,

	dev_dbg(dev, "GRPCFG engs[%d: %#x]: %#llx\n", group->id,

		grpcfg_offset, ioread64(idxd->reg_base + grpcfg_offset));

		grpcfg_offset, ioread64(idxd->reg_base + grpcfg_offset));





	/* setup GRPFLAGS */

	/* setup GRPFLAGS */

	grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 40;

	grpcfg_offset = GRPFLGCFG_OFFSET(idxd, group->id);

	iowrite32(group->grpcfg.flags.bits, idxd->reg_base + grpcfg_offset);

	iowrite32(group->grpcfg.flags.bits, idxd->reg_base + grpcfg_offset);

	dev_dbg(dev, "GRPFLAGS flags[%d: %#x]: %#x\n",

	dev_dbg(dev, "GRPFLAGS flags[%d: %#x]: %#x\n",

		group->id, grpcfg_offset,

		group->id, grpcfg_offset,

drivers/dma/idxd/registers.h

+18 −0
Original line number Original line Diff line number Diff line
@@ -356,4 +356,22 @@ union wqcfg { 




#define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))

#define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))





#define GRPCFG_SIZE		64

#define GRPWQCFG_STRIDES	4



/*

 * This macro calculates the offset into the GRPCFG register

 * idxd - struct idxd *

 * n - wq id

 * ofs - the index of the 32b dword for the config register

 *

 * The WQCFG register block is divided into groups per each wq. The n index

 * allows us to move to the register group that's for that particular wq.

 * Each register is 32bits. The ofs gives us the number of register to access.

 */

#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\

					   (n) * GRPCFG_SIZE + sizeof(u64) * (ofs))

#define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)

#define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)



#endif
 
#endif