Commit 5a5c7b35 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

dt-bindings: display/msm: move common MDSS properties to mdss-common.yaml



Move properties common to all MDSS DT nodes to the mdss-common.yaml.

This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
will be added later, once msm8998 gains interconnect support.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/508385/
Link: https://lore.kernel.org/r/20221024164225.3236654-6-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent c3d7f3e7
Loading
Loading
Loading
Loading
+4 −37
Original line number Diff line number Diff line
@@ -14,20 +14,13 @@ description: |
  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
  bindings of MDSS and DPU are mentioned for MSM8998 target.

$ref: /schemas/display/msm/mdss-common.yaml#

properties:
  compatible:
    items:
      - const: qcom,msm8998-mdss

  reg:
    maxItems: 1

  reg-names:
    const: mdss

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: Display AHB clock
@@ -40,23 +33,8 @@ properties:
      - const: bus
      - const: core

  interrupts:
    maxItems: 1

  interrupt-controller: true

  "#address-cells": true

  "#size-cells": true

  "#interrupt-cells":
    const: 1

  iommus:
    items:
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0

  ranges: true
    maxItems: 1

patternProperties:
  "^display-controller@[0-9a-f]+$":
@@ -100,18 +78,7 @@ patternProperties:
          - const: core
          - const: vsync

required:
  - compatible
  - reg
  - reg-names
  - power-domains
  - clocks
  - interrupts
  - interrupt-controller
  - iommus
  - ranges

additionalProperties: false
unevaluatedProperties: false

examples:
  - |
+6 −45
Original line number Diff line number Diff line
@@ -14,20 +14,13 @@ description: |
  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
  and DPU are mentioned for QCM2290 target.

$ref: /schemas/display/msm/mdss-common.yaml#

properties:
  compatible:
    items:
      - const: qcom,qcm2290-mdss

  reg:
    maxItems: 1

  reg-names:
    const: mdss

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: Display AHB clock from gcc
@@ -40,35 +33,14 @@ properties:
      - const: bus
      - const: core

  interrupts:
    maxItems: 1

  interrupt-controller: true

  "#address-cells": true

  "#size-cells": true

  "#interrupt-cells":
    const: 1

  iommus:
    items:
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1

  ranges: true
    maxItems: 2

  interconnects:
    items:
      - description: Interconnect path specifying the port ids for data bus
    maxItems: 1

  interconnect-names:
    const: mdp0-mem

  resets:
    items:
      - description: MDSS_CORE reset
    maxItems: 1

patternProperties:
  "^display-controller@[0-9a-f]+$":
@@ -108,18 +80,7 @@ patternProperties:
          - const: lut
          - const: vsync

required:
  - compatible
  - reg
  - reg-names
  - power-domains
  - clocks
  - interrupts
  - interrupt-controller
  - iommus
  - ranges

additionalProperties: false
unevaluatedProperties: false

examples:
  - |
+6 −44
Original line number Diff line number Diff line
@@ -14,20 +14,13 @@ description: |
  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
  bindings of MDSS and DPU are mentioned for SC7180 target.

$ref: /schemas/display/msm/mdss-common.yaml#

properties:
  compatible:
    items:
      - const: qcom,sc7180-mdss

  reg:
    maxItems: 1

  reg-names:
    const: mdss

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: Display AHB clock from gcc
@@ -40,34 +33,14 @@ properties:
      - const: ahb
      - const: core

  interrupts:
    maxItems: 1

  interrupt-controller: true

  "#address-cells": true

  "#size-cells": true

  "#interrupt-cells":
    const: 1

  iommus:
    items:
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0

  ranges: true
    maxItems: 1

  interconnects:
    items:
      - description: Interconnect path specifying the port ids for data bus
    maxItems: 1

  interconnect-names:
    const: mdp0-mem

  resets:
    items:
      - description: MDSS_CORE reset
    maxItems: 1

patternProperties:
  "^display-controller@[0-9a-f]+$":
@@ -109,18 +82,7 @@ patternProperties:
          - const: core
          - const: vsync

required:
  - compatible
  - reg
  - reg-names
  - power-domains
  - clocks
  - interrupts
  - interrupt-controller
  - iommus
  - ranges

additionalProperties: false
unevaluatedProperties: false

examples:
  - |
+6 −44
Original line number Diff line number Diff line
@@ -14,19 +14,12 @@ description: |
  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
  bindings of MDSS and DPU are mentioned for SC7280.

$ref: /schemas/display/msm/mdss-common.yaml#

properties:
  compatible:
    const: qcom,sc7280-mdss

  reg:
    maxItems: 1

  reg-names:
    const: mdss

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: Display AHB clock from gcc
@@ -39,34 +32,14 @@ properties:
      - const: ahb
      - const: core

  interrupts:
    maxItems: 1

  interrupt-controller: true

  "#address-cells": true

  "#size-cells": true

  "#interrupt-cells":
    const: 1

  iommus:
    items:
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0

  ranges: true
    maxItems: 1

  interconnects:
    items:
      - description: Interconnect path specifying the port ids for data bus
    maxItems: 1

  interconnect-names:
    const: mdp0-mem

  resets:
    items:
      - description: MDSS_CORE reset
    maxItems: 1

patternProperties:
  "^display-controller@[0-9a-f]+$":
@@ -107,18 +80,7 @@ patternProperties:
          - const: core
          - const: vsync

required:
  - compatible
  - reg
  - reg-names
  - power-domains
  - clocks
  - interrupts
  - interrupt-controller
  - iommus
  - ranges

additionalProperties: false
unevaluatedProperties: false

examples:
  - |
+6 −48
Original line number Diff line number Diff line
@@ -14,20 +14,13 @@ description: |
  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
  bindings of MDSS and DPU are mentioned for SDM845 target.

$ref: /schemas/display/msm/mdss-common.yaml#

properties:
  compatible:
    items:
      - const: qcom,sdm845-mdss

  reg:
    maxItems: 1

  reg-names:
    const: mdss

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: Display AHB clock from gcc
@@ -38,38 +31,14 @@ properties:
      - const: iface
      - const: core

  interrupts:
    maxItems: 1

  interrupt-controller: true

  "#address-cells": true

  "#size-cells": true

  "#interrupt-cells":
    const: 1

  iommus:
    items:
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1

  ranges: true
    maxItems: 2

  interconnects:
    items:
      - description: Interconnect path from mdp0 port to the data bus
      - description: Interconnect path from mdp1 port to the data bus
    maxItems: 2

  interconnect-names:
    items:
      - const: mdp0-mem
      - const: mdp1-mem

  resets:
    items:
      - description: MDSS_CORE reset
    maxItems: 2

patternProperties:
  "^display-controller@[0-9a-f]+$":
@@ -109,18 +78,7 @@ patternProperties:
          - const: core
          - const: vsync

required:
  - compatible
  - reg
  - reg-names
  - power-domains
  - clocks
  - interrupts
  - interrupt-controller
  - iommus
  - ranges

additionalProperties: false
unevaluatedProperties: false

examples:
  - |
Loading