Commit 5a50e467 authored by Stephane Eranian's avatar Stephane Eranian Committed by Xie Haocheng
Browse files

perf/core: Add perf_clear_branch_entry_bitfields() helper 

mainline inclusion
from mainline-v5.19
commit bfe4daf8
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5S3WV


CVE: NA

-------------------------------------------------

Make it simpler to reset all the info fields on the
perf_branch_entry by adding a helper inline function.

The goal is to centralize the initialization to avoid missing
a field in case more are added.

Signed-off-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220322221517.2510440-2-eranian@google.com


Signed-off-by: default avatarXie Haocheng <haocheng.xie@amd.com>
parent b5c57831

arch/x86/events/intel/lbr.c

+17 −19
Original line number Diff line number Diff line
@@ -786,6 +786,7 @@ void intel_pmu_lbr_disable_all(void) 
void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)

{

	unsigned long mask = x86_pmu.lbr_nr - 1;

	struct perf_branch_entry *br = cpuc->lbr_entries;

	u64 tos = intel_pmu_lbr_tos();

	int i;
@@ -801,15 +802,11 @@ void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) 


		rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);



		cpuc->lbr_entries[i].from	= msr_lastbranch.from;

		cpuc->lbr_entries[i].to		= msr_lastbranch.to;

		cpuc->lbr_entries[i].mispred	= 0;

		cpuc->lbr_entries[i].predicted	= 0;

		cpuc->lbr_entries[i].in_tx	= 0;

		cpuc->lbr_entries[i].abort	= 0;

		cpuc->lbr_entries[i].cycles	= 0;

		cpuc->lbr_entries[i].type	= 0;

		cpuc->lbr_entries[i].reserved	= 0;

		perf_clear_branch_entry_bitfields(br);



		br->from	= msr_lastbranch.from;

		br->to		= msr_lastbranch.to;

		br++;

	}

	cpuc->lbr_stack.nr = i;

	cpuc->lbr_stack.hw_idx = tos;
@@ -825,6 +822,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) 
	bool need_info = false, call_stack = false;

	unsigned long mask = x86_pmu.lbr_nr - 1;

	int lbr_format = x86_pmu.intel_cap.lbr_format;

	struct perf_branch_entry *br = cpuc->lbr_entries;

	u64 tos = intel_pmu_lbr_tos();

	int i;

	int out = 0;
@@ -896,15 +894,14 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) 
		if (abort && x86_pmu.lbr_double_abort && out > 0)

			out--;



		cpuc->lbr_entries[out].from	 = from;

		cpuc->lbr_entries[out].to	 = to;

		cpuc->lbr_entries[out].mispred	 = mis;

		cpuc->lbr_entries[out].predicted = pred;

		cpuc->lbr_entries[out].in_tx	 = in_tx;

		cpuc->lbr_entries[out].abort	 = abort;

		cpuc->lbr_entries[out].cycles	 = cycles;

		cpuc->lbr_entries[out].type	 = 0;

		cpuc->lbr_entries[out].reserved	 = 0;

		perf_clear_branch_entry_bitfields(br+out);

		br[out].from	 = from;

		br[out].to	 = to;

		br[out].mispred	 = mis;

		br[out].predicted = pred;

		br[out].in_tx	 = in_tx;

		br[out].abort	 = abort;

		br[out].cycles	 = cycles;

		out++;

	}

	cpuc->lbr_stack.nr = out;
@@ -966,6 +963,8 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, 
		to = rdlbr_to(i, lbr);

		info = rdlbr_info(i, lbr);



		perf_clear_branch_entry_bitfields(e);



		e->from		= from;

		e->to		= to;

		e->mispred	= get_lbr_mispred(info);
@@ -974,7 +973,6 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, 
		e->abort	= !!(info & LBR_INFO_ABORT);

		e->cycles	= get_lbr_cycles(info);

		e->type		= get_lbr_br_type(info);

		e->reserved	= 0;

	}



	cpuc->lbr_stack.nr = i;

include/linux/perf_event.h

+16 −0
Original line number Diff line number Diff line
@@ -1062,6 +1062,22 @@ static inline void perf_sample_data_init(struct perf_sample_data *data, 
	data->txn = 0;

}



/*

 * Clear all bitfields in the perf_branch_entry.

 * The to and from fields are not cleared because they are

 * systematically modified by caller.

 */

static inline void perf_clear_branch_entry_bitfields(struct perf_branch_entry *br)

{

	br->mispred = 0;

	br->predicted = 0;

	br->in_tx = 0;

	br->abort = 0;

	br->cycles = 0;

	br->type = 0;

	br->reserved = 0;

}



extern void perf_output_sample(struct perf_output_handle *handle,

			       struct perf_event_header *header,

			       struct perf_sample_data *data,