Commit 5a47ebe9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2021-10-31' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq updates from Thomas Gleixner:
 "Updates for the interrupt subsystem:

  Core changes:

   - Prevent a potential deadlock when initial priority is assigned to a
     newly created interrupt thread. A recent change to plug a race
     between cpuset and __sched_setscheduler() introduced a new lock
     dependency which is now triggered. Break the lock dependency chain
     by moving the priority assignment to the thread function.

   - A couple of small updates to make the irq core RT safe.

   - Confine the irq_cpu_online/offline() API to the only left unfixable
     user Cavium Octeon so that it does not grow new usage.

   - A small documentation update

  Driver changes:

   - A large cross architecture rework to move irq_enter/exit() into the
     architecture code to make addressing the NOHZ_FULL/RCU issues
     simpler.

   - The obligatory new irq chip driver for Microchip EIC

   - Modularize a few irq chip drivers

   - Expand usage of devm_*() helpers throughout the driver code

   - The usual small fixes and improvements all over the place"

* tag 'irq-core-2021-10-31' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (53 commits)
  h8300: Fix linux/irqchip.h include mess
  dt-bindings: irqchip: renesas-irqc: Document r8a774e1 bindings
  MIPS: irq: Avoid an unused-variable error
  genirq: Hide irq_cpu_{on,off}line() behind a deprecated option
  irqchip/mips-gic: Get rid of the reliance on irq_cpu_online()
  MIPS: loongson64: Drop call to irq_cpu_offline()
  irq: remove handle_domain_{irq,nmi}()
  irq: remove CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY
  irq: riscv: perform irqentry in entry code
  irq: openrisc: perform irqentry in entry code
  irq: csky: perform irqentry in entry code
  irq: arm64: perform irqentry in entry code
  irq: arm: perform irqentry in entry code
  irq: add a (temporary) CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY
  irq: nds32: avoid CONFIG_HANDLE_DOMAIN_IRQ
  irq: arc: avoid CONFIG_HANDLE_DOMAIN_IRQ
  irq: add generic_handle_arch_irq()
  irq: unexport handle_irq_desc()
  irq: simplify handle_domain_{irq,nmi}()
  irq: mips: simplify do_domain_IRQ()
  ...
parents 037c50bf 2258a6fc

Documentation/core-api/irq/irq-domain.rst

+0 −3
Original line number Diff line number Diff line
@@ -67,9 +67,6 @@ variety of methods: 
  deprecated

- generic_handle_domain_irq() handles an interrupt described by a

  domain and a hwirq number

- handle_domain_irq() does the same thing for root interrupt

  controllers and deals with the set_irq_reg()/irq_enter() sequences

  that most architecture requires



Note that irq domain lookups must happen in contexts that are

compatible with a RCU read-side critical section.

Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml

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+73 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/microchip,eic.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Microchip External Interrupt Controller



maintainers:

  - Claudiu Beznea <claudiu.beznea@microchip.com>



description:

  This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides

  support for handling up to 2 external interrupt lines.



properties:

  compatible:

    enum:

      - microchip,sama7g5-eic



  reg:

    maxItems: 1



  interrupt-controller: true



  '#interrupt-cells':

    const: 2

    description:

      The first cell is the input IRQ number (between 0 and 1), the second cell

      is the trigger type as defined in interrupt.txt present in this directory.



  interrupts:

    description: |

      Contains the GIC SPI IRQs mapped to the external interrupt lines. They

      should be specified sequentially from output 0 to output 1.

    minItems: 2

    maxItems: 2



  clocks:

    maxItems: 1



  clock-names:

    const: pclk



required:

  - compatible

  - reg

  - interrupt-controller

  - '#interrupt-cells'

  - interrupts

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/at91.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    eic: interrupt-controller@e1628000 {

      compatible = "microchip,sama7g5-eic";

      reg = <0xe1628000 0x100>;

      interrupt-parent = <&gic>;

      interrupt-controller;

      #interrupt-cells = <2>;

      interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,

                   <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;

      clock-names = "pclk";

    };



...

Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml

+1 −0
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@@ -27,6 +27,7 @@ properties: 
          - renesas,intc-ex-r8a774a1    # RZ/G2M

          - renesas,intc-ex-r8a774b1    # RZ/G2N

          - renesas,intc-ex-r8a774c0    # RZ/G2E

          - renesas,intc-ex-r8a774e1    # RZ/G2H

          - renesas,intc-ex-r8a7795     # R-Car H3

          - renesas,intc-ex-r8a7796     # R-Car M3-W

          - renesas,intc-ex-r8a77961    # R-Car M3-W+

MAINTAINERS

+7 −1
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@@ -1552,7 +1552,7 @@ ARM PRIMECELL VIC PL190/PL192 DRIVER 
M:	Linus Walleij <linus.walleij@linaro.org>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained

F:	Documentation/devicetree/bindings/interrupt-controller/arm,vic.txt

F:	Documentation/devicetree/bindings/interrupt-controller/arm,vic.yaml

F:	drivers/irqchip/irq-vic.c









ARM SMC WATCHDOG DRIVER








@@ -12270,6 +12270,12 @@ L:	linux-crypto@vger.kernel.org







S:	Maintained









F:	drivers/crypto/atmel-ecc.*

















MICROCHIP EIC DRIVER









M:	Claudiu Beznea <claudiu.beznea@microchip.com>









L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)









S:	Supported









F:	drivers/irqchip/irq-mchp-eic.c

















MICROCHIP I2C DRIVER









M:	Codrin Ciubotariu <codrin.ciubotariu@microchip.com>









L:	linux-i2c@vger.kernel.org
































arch/arc/Kconfig



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−1






























Original line number
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Diff line







@@ -40,7 +40,6 @@ config ARC







	select HAVE_KRETPROBES









	select HAVE_MOD_ARCH_SPECIFIC









	select HAVE_PERF_EVENTS









	select HANDLE_DOMAIN_IRQ









	select IRQ_DOMAIN









	select MODULES_USE_ELF_RELA









	select OF