Commit 5a21bf5b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue 



Tony Nguyen says:

====================
100GbE Intel Wired LAN Driver Updates 2021-12-14

This series contains updates to ice driver only.

Haiyue adds support to query hardware for supported PTYPEs.

Jeff changes PTYPE validation to utilize the capabilities queried from
the hardware instead of maintaining a per DDP support list.

Brett refactors promiscuous functions to provide common and clear
interfaces to call for configuration.

Wojciech modifies DDP package load to simplify determining the final
state of the load.

Tony removes the use of ice_status from the driver. This involves
removing string conversion functions, converting variables and values to
standard errors, and clean up. He also removes an unused define.

Dan Carpenter removes unneeded casts.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 0b6f65c7 f8a3bcce

drivers/net/ethernet/intel/ice/ice.h

+0 −1
Original line number Diff line number Diff line
@@ -848,7 +848,6 @@ void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 
int ice_plug_aux_dev(struct ice_pf *pf);

void ice_unplug_aux_dev(struct ice_pf *pf);

int ice_init_rdma(struct ice_pf *pf);

const char *ice_stat_str(enum ice_status stat_err);

const char *ice_aq_str(enum ice_aq_err aq_err);

bool ice_is_wol_supported(struct ice_hw *hw);

int

drivers/net/ethernet/intel/ice/ice_base.c

+11 −11
Original line number Diff line number Diff line
@@ -759,7 +759,7 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring, 
	struct ice_channel *ch = ring->ch;

	struct ice_pf *pf = vsi->back;

	struct ice_hw *hw = &pf->hw;

	enum ice_status status;

	int status;

	u16 pf_q;

	u8 tc;
@@ -804,9 +804,9 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring, 
					 ring->q_handle, 1, qg_buf, buf_len,

					 NULL);

	if (status) {

		dev_err(ice_pf_to_dev(pf), "Failed to set LAN Tx queue context, error: %s\n",

			ice_stat_str(status));

		return -ENODEV;

		dev_err(ice_pf_to_dev(pf), "Failed to set LAN Tx queue context, error: %d\n",

			status);

		return status;

	}



	/* Add Tx Queue TEID into the VSI Tx ring from the
@@ -929,7 +929,7 @@ ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 
	struct ice_pf *pf = vsi->back;

	struct ice_q_vector *q_vector;

	struct ice_hw *hw = &pf->hw;

	enum ice_status status;

	int status;

	u32 val;



	/* clear cause_ena bit for disabled queues */
@@ -953,18 +953,18 @@ ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 
				 rel_vmvf_num, NULL);



	/* if the disable queue command was exercised during an

	 * active reset flow, ICE_ERR_RESET_ONGOING is returned.

	 * active reset flow, -EBUSY is returned.

	 * This is not an error as the reset operation disables

	 * queues at the hardware level anyway.

	 */

	if (status == ICE_ERR_RESET_ONGOING) {

	if (status == -EBUSY) {

		dev_dbg(ice_pf_to_dev(vsi->back), "Reset in progress. LAN Tx queues already disabled\n");

	} else if (status == ICE_ERR_DOES_NOT_EXIST) {

	} else if (status == -ENOENT) {

		dev_dbg(ice_pf_to_dev(vsi->back), "LAN Tx queues do not exist, nothing to disable\n");

	} else if (status) {

		dev_dbg(ice_pf_to_dev(vsi->back), "Failed to disable LAN Tx queues, error: %s\n",

			ice_stat_str(status));

		return -ENODEV;

		dev_dbg(ice_pf_to_dev(vsi->back), "Failed to disable LAN Tx queues, error: %d\n",

			status);

		return status;

	}



	return 0;

drivers/net/ethernet/intel/ice/ice_common.c

+197 −206

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/intel/ice/ice_common.h

+48 −48
Original line number Diff line number Diff line
@@ -14,108 +14,108 @@ 
#define ICE_SQ_SEND_DELAY_TIME_MS	10

#define ICE_SQ_SEND_MAX_EXECUTE		3



enum ice_status ice_init_hw(struct ice_hw *hw);

int ice_init_hw(struct ice_hw *hw);

void ice_deinit_hw(struct ice_hw *hw);

enum ice_status ice_check_reset(struct ice_hw *hw);

enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);

enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);

enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);

int ice_check_reset(struct ice_hw *hw);

int ice_reset(struct ice_hw *hw, enum ice_reset_req req);

int ice_create_all_ctrlq(struct ice_hw *hw);

int ice_init_all_ctrlq(struct ice_hw *hw);

void ice_shutdown_all_ctrlq(struct ice_hw *hw);

void ice_destroy_all_ctrlq(struct ice_hw *hw);

enum ice_status

int

ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,

		  struct ice_rq_event_info *e, u16 *pending);

enum ice_status

int

ice_get_link_status(struct ice_port_info *pi, bool *link_up);

enum ice_status ice_update_link_info(struct ice_port_info *pi);

enum ice_status

int ice_update_link_info(struct ice_port_info *pi);

int

ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,

		enum ice_aq_res_access_type access, u32 timeout);

void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);

enum ice_status

int

ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);

enum ice_status

int

ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);

enum ice_status

int

ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,

		      struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,

		      enum ice_adminq_opc opc, struct ice_sq_cd *cd);

bool ice_is_sbq_supported(struct ice_hw *hw);

struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);

enum ice_status

int

ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,

		struct ice_aq_desc *desc, void *buf, u16 buf_size,

		struct ice_sq_cd *cd);

void ice_clear_pxe_mode(struct ice_hw *hw);

enum ice_status ice_get_caps(struct ice_hw *hw);

int ice_get_caps(struct ice_hw *hw);



void ice_set_safe_mode_caps(struct ice_hw *hw);



enum ice_status

int

ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,

		  u32 rxq_index);



enum ice_status

int

ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);

enum ice_status

int

ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);

enum ice_status

int

ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,

		   struct ice_aqc_get_set_rss_keys *keys);

enum ice_status

int

ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,

		   struct ice_aqc_get_set_rss_keys *keys);



bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);

enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);

int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);

void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);

extern const struct ice_ctx_ele ice_tlan_ctx_info[];

enum ice_status

int

ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,

	    const struct ice_ctx_ele *ce_info);



extern struct mutex ice_global_cfg_lock_sw;



enum ice_status

int

ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,

		void *buf, u16 buf_size, struct ice_sq_cd *cd);

enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);

int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);



enum ice_status

int

ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,

		       struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,

		    struct ice_aqc_get_phy_caps_data *caps,

		    struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,

		 enum ice_adminq_opc opc, struct ice_sq_cd *cd);

enum ice_status

int

ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);

void

ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,

		    u16 link_speeds_bitmap);

enum ice_status

int

ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,

			struct ice_sq_cd *cd);

bool ice_is_e810(struct ice_hw *hw);

enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);

enum ice_status

int ice_clear_pf_cfg(struct ice_hw *hw);

int

ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,

		   struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);

bool ice_fw_supports_link_override(struct ice_hw *hw);

enum ice_status

int

ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,

			      struct ice_port_info *pi);

bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);



enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);

enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);

enum ice_status

int

ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,

	   bool ena_auto_link_update);

enum ice_status

int

ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,

	       enum ice_fc_mode fc);

bool
@@ -125,27 +125,27 @@ void 
ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,

			 struct ice_aqc_get_phy_caps_data *caps,

			 struct ice_aqc_set_phy_cfg_data *cfg);

enum ice_status

int

ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,

		enum ice_fec_mode fec);

enum ice_status

int

ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,

			   struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,

		     struct ice_link_status *link, struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,

		      struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);



enum ice_status

int

ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,

		       struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,

		  u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,

		  bool write, struct ice_sq_cd *cd);
@@ -159,19 +159,19 @@ ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 
int

ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,

		      u16 *q_id);

enum ice_status

int

ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,

		u16 *q_handle, u16 *q_ids, u32 *q_teids,

		enum ice_disq_rst_src rst_src, u16 vmvf_num,

		struct ice_sq_cd *cd);

enum ice_status

int

ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,

		u16 *max_lanqs);

enum ice_status

int

ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,

		u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,

		struct ice_sq_cd *cd);

enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);

int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);

void ice_replay_post(struct ice_hw *hw);

void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);

struct ice_q_ctx *
@@ -184,7 +184,7 @@ void 
ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

		  u64 *prev_stat, u64 *cur_stat);

bool ice_is_e810t(struct ice_hw *hw);

enum ice_status

int

ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,

		     struct ice_aqc_txsched_elem_data *buf);

int
@@ -199,11 +199,11 @@ ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, 
int

ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

		bool *value, struct ice_sq_cd *cd);

enum ice_status

int

ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,

		    struct ice_sq_cd *cd);

bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);

enum ice_status

int

ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);

bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);

#endif /* _ICE_COMMON_H_ */

drivers/net/ethernet/intel/ice/ice_controlq.c

+58 −62
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * @hw: pointer to the hardware structure

 * @cq: pointer to the specific Control queue

 */

static enum ice_status

static int

ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	size_t size = cq->num_sq_entries * sizeof(struct ice_aq_desc);
@@ -96,7 +96,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
						 &cq->sq.desc_buf.pa,

						 GFP_KERNEL | __GFP_ZERO);

	if (!cq->sq.desc_buf.va)

		return ICE_ERR_NO_MEMORY;

		return -ENOMEM;

	cq->sq.desc_buf.size = size;



	cq->sq.cmd_buf = devm_kcalloc(ice_hw_to_dev(hw), cq->num_sq_entries,
@@ -107,7 +107,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
		cq->sq.desc_buf.va = NULL;

		cq->sq.desc_buf.pa = 0;

		cq->sq.desc_buf.size = 0;

		return ICE_ERR_NO_MEMORY;

		return -ENOMEM;

	}



	return 0;
@@ -118,7 +118,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * @hw: pointer to the hardware structure

 * @cq: pointer to the specific Control queue

 */

static enum ice_status

static int

ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	size_t size = cq->num_rq_entries * sizeof(struct ice_aq_desc);
@@ -127,7 +127,7 @@ ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
						 &cq->rq.desc_buf.pa,

						 GFP_KERNEL | __GFP_ZERO);

	if (!cq->rq.desc_buf.va)

		return ICE_ERR_NO_MEMORY;

		return -ENOMEM;

	cq->rq.desc_buf.size = size;

	return 0;

}
@@ -154,7 +154,7 @@ static void ice_free_cq_ring(struct ice_hw *hw, struct ice_ctl_q_ring *ring) 
 * @hw: pointer to the hardware structure

 * @cq: pointer to the specific Control queue

 */

static enum ice_status

static int

ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	int i;
@@ -165,7 +165,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
	cq->rq.dma_head = devm_kcalloc(ice_hw_to_dev(hw), cq->num_rq_entries,

				       sizeof(cq->rq.desc_buf), GFP_KERNEL);

	if (!cq->rq.dma_head)

		return ICE_ERR_NO_MEMORY;

		return -ENOMEM;

	cq->rq.r.rq_bi = (struct ice_dma_mem *)cq->rq.dma_head;



	/* allocate the mapped buffers */
@@ -218,7 +218,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
	devm_kfree(ice_hw_to_dev(hw), cq->rq.dma_head);

	cq->rq.dma_head = NULL;



	return ICE_ERR_NO_MEMORY;

	return -ENOMEM;

}



/**
@@ -226,7 +226,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * @hw: pointer to the hardware structure

 * @cq: pointer to the specific Control queue

 */

static enum ice_status

static int

ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	int i;
@@ -235,7 +235,7 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
	cq->sq.dma_head = devm_kcalloc(ice_hw_to_dev(hw), cq->num_sq_entries,

				       sizeof(cq->sq.desc_buf), GFP_KERNEL);

	if (!cq->sq.dma_head)

		return ICE_ERR_NO_MEMORY;

		return -ENOMEM;

	cq->sq.r.sq_bi = (struct ice_dma_mem *)cq->sq.dma_head;



	/* allocate the mapped buffers */
@@ -266,10 +266,10 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
	devm_kfree(ice_hw_to_dev(hw), cq->sq.dma_head);

	cq->sq.dma_head = NULL;



	return ICE_ERR_NO_MEMORY;

	return -ENOMEM;

}



static enum ice_status

static int

ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)

{

	/* Clear Head and Tail */
@@ -283,7 +283,7 @@ ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries) 


	/* Check one register to verify that config was applied */

	if (rd32(hw, ring->bal) != lower_32_bits(ring->desc_buf.pa))

		return ICE_ERR_AQ_ERROR;

		return -EIO;



	return 0;

}
@@ -295,8 +295,7 @@ ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries) 
 *

 * Configure base address and length registers for the transmit queue

 */

static enum ice_status

ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	return ice_cfg_cq_regs(hw, &cq->sq, cq->num_sq_entries);

}
@@ -308,10 +307,9 @@ ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 *

 * Configure base address and length registers for the receive (event queue)

 */

static enum ice_status

ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	enum ice_status status;

	int status;



	status = ice_cfg_cq_regs(hw, &cq->rq, cq->num_rq_entries);

	if (status)
@@ -361,19 +359,19 @@ do { \ 
 * Do *NOT* hold the lock when calling this as the memory allocation routines

 * called are not going to be atomic context safe

 */

static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	enum ice_status ret_code;

	int ret_code;



	if (cq->sq.count > 0) {

		/* queue already initialized */

		ret_code = ICE_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto init_ctrlq_exit;

	}



	/* verify input for valid configuration */

	if (!cq->num_sq_entries || !cq->sq_buf_size) {

		ret_code = ICE_ERR_CFG;

		ret_code = -EIO;

		goto init_ctrlq_exit;

	}
@@ -421,19 +419,19 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * Do *NOT* hold the lock when calling this as the memory allocation routines

 * called are not going to be atomic context safe

 */

static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	enum ice_status ret_code;

	int ret_code;



	if (cq->rq.count > 0) {

		/* queue already initialized */

		ret_code = ICE_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto init_ctrlq_exit;

	}



	/* verify input for valid configuration */

	if (!cq->num_rq_entries || !cq->rq_buf_size) {

		ret_code = ICE_ERR_CFG;

		ret_code = -EIO;

		goto init_ctrlq_exit;

	}
@@ -474,15 +472,14 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 *

 * The main shutdown routine for the Control Transmit Queue

 */

static enum ice_status

ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	enum ice_status ret_code = 0;

	int ret_code = 0;



	mutex_lock(&cq->sq_lock);



	if (!cq->sq.count) {

		ret_code = ICE_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto shutdown_sq_out;

	}
@@ -541,15 +538,14 @@ static bool ice_aq_ver_check(struct ice_hw *hw) 
 *

 * The main shutdown routine for the Control Receive Queue

 */

static enum ice_status

ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

static int ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

{

	enum ice_status ret_code = 0;

	int ret_code = 0;



	mutex_lock(&cq->rq_lock);



	if (!cq->rq.count) {

		ret_code = ICE_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto shutdown_rq_out;

	}
@@ -576,17 +572,17 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * ice_init_check_adminq - Check version for Admin Queue to know if its alive

 * @hw: pointer to the hardware structure

 */

static enum ice_status ice_init_check_adminq(struct ice_hw *hw)

static int ice_init_check_adminq(struct ice_hw *hw)

{

	struct ice_ctl_q_info *cq = &hw->adminq;

	enum ice_status status;

	int status;



	status = ice_aq_get_fw_ver(hw, NULL);

	if (status)

		goto init_ctrlq_free_rq;



	if (!ice_aq_ver_check(hw)) {

		status = ICE_ERR_FW_API_VER;

		status = -EIO;

		goto init_ctrlq_free_rq;

	}
@@ -612,10 +608,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) 
 *

 * NOTE: this function does not initialize the controlq locks

 */

static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)

static int ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)

{

	struct ice_ctl_q_info *cq;

	enum ice_status ret_code;

	int ret_code;



	switch (q_type) {

	case ICE_CTL_Q_ADMIN:
@@ -631,14 +627,14 @@ static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type) 
		cq = &hw->mailboxq;

		break;

	default:

		return ICE_ERR_PARAM;

		return -EINVAL;

	}

	cq->qtype = q_type;



	/* verify input for valid configuration */

	if (!cq->num_rq_entries || !cq->num_sq_entries ||

	    !cq->rq_buf_size || !cq->sq_buf_size) {

		return ICE_ERR_CFG;

		return -EIO;

	}



	/* setup SQ command write back timeout */
@@ -751,10 +747,10 @@ void ice_shutdown_all_ctrlq(struct ice_hw *hw) 
 *

 * NOTE: this function does not initialize the controlq locks.

 */

enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)

int ice_init_all_ctrlq(struct ice_hw *hw)

{

	enum ice_status status;

	u32 retry = 0;

	int status;



	/* Init FW admin queue */

	do {
@@ -763,7 +759,7 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) 
			return status;



		status = ice_init_check_adminq(hw);

		if (status != ICE_ERR_AQ_FW_CRITICAL)

		if (status != -EIO)

			break;



		ice_debug(hw, ICE_DBG_AQ_MSG, "Retry Admin Queue init due to FW critical error\n");
@@ -814,7 +810,7 @@ static void ice_init_ctrlq_locks(struct ice_ctl_q_info *cq) 
 * driver needs to re-initialize control queues at run time it should call

 * ice_init_all_ctrlq instead.

 */

enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)

int ice_create_all_ctrlq(struct ice_hw *hw)

{

	ice_init_ctrlq_locks(&hw->adminq);

	if (ice_is_sbq_supported(hw))
@@ -962,7 +958,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq) 
 * This is the main send command routine for the ATQ. It runs the queue,

 * cleans the queue, etc.

 */

enum ice_status

int

ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,

		struct ice_aq_desc *desc, void *buf, u16 buf_size,

		struct ice_sq_cd *cd)
@@ -970,27 +966,27 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
	struct ice_dma_mem *dma_buf = NULL;

	struct ice_aq_desc *desc_on_ring;

	bool cmd_completed = false;

	enum ice_status status = 0;

	struct ice_sq_cd *details;

	u32 total_delay = 0;

	int status = 0;

	u16 retval = 0;

	u32 val = 0;



	/* if reset is in progress return a soft error */

	if (hw->reset_ongoing)

		return ICE_ERR_RESET_ONGOING;

		return -EBUSY;

	mutex_lock(&cq->sq_lock);



	cq->sq_last_status = ICE_AQ_RC_OK;



	if (!cq->sq.count) {

		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");

		status = ICE_ERR_AQ_EMPTY;

		status = -EIO;

		goto sq_send_command_error;

	}



	if ((buf && !buf_size) || (!buf && buf_size)) {

		status = ICE_ERR_PARAM;

		status = -EINVAL;

		goto sq_send_command_error;

	}
@@ -998,7 +994,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
		if (buf_size > cq->sq_buf_size) {

			ice_debug(hw, ICE_DBG_AQ_MSG, "Invalid buffer size for Control Send queue: %d.\n",

				  buf_size);

			status = ICE_ERR_INVAL_SIZE;

			status = -EINVAL;

			goto sq_send_command_error;

		}
@@ -1011,7 +1007,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
	if (val >= cq->num_sq_entries) {

		ice_debug(hw, ICE_DBG_AQ_MSG, "head overrun at %d in the Control Send Queue ring\n",

			  val);

		status = ICE_ERR_AQ_EMPTY;

		status = -EIO;

		goto sq_send_command_error;

	}
@@ -1028,7 +1024,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
	 */

	if (ice_clean_sq(hw, cq) == 0) {

		ice_debug(hw, ICE_DBG_AQ_MSG, "Error: Control Send Queue is full.\n");

		status = ICE_ERR_AQ_FULL;

		status = -ENOSPC;

		goto sq_send_command_error;

	}
@@ -1082,7 +1078,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
			if (copy_size > buf_size) {

				ice_debug(hw, ICE_DBG_AQ_MSG, "Return len %d > than buf len %d\n",

					  copy_size, buf_size);

				status = ICE_ERR_AQ_ERROR;

				status = -EIO;

			} else {

				memcpy(buf, dma_buf->va, copy_size);

			}
@@ -1098,7 +1094,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
		}

		cmd_completed = true;

		if (!status && retval != ICE_AQ_RC_OK)

			status = ICE_ERR_AQ_ERROR;

			status = -EIO;

		cq->sq_last_status = (enum ice_aq_err)retval;

	}
@@ -1116,10 +1112,10 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
		if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||

		    rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {

			ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");

			status = ICE_ERR_AQ_FW_CRITICAL;

			status = -EIO;

		} else {

			ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue Writeback timeout.\n");

			status = ICE_ERR_AQ_TIMEOUT;

			status = -EIO;

		}

	}
@@ -1154,15 +1150,15 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode) 
 * the contents through e. It can also return how many events are

 * left to process through 'pending'.

 */

enum ice_status

int

ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,

		  struct ice_rq_event_info *e, u16 *pending)

{

	u16 ntc = cq->rq.next_to_clean;

	enum ice_aq_err rq_last_status;

	enum ice_status ret_code = 0;

	struct ice_aq_desc *desc;

	struct ice_dma_mem *bi;

	int ret_code = 0;

	u16 desc_idx;

	u16 datalen;

	u16 flags;
@@ -1176,7 +1172,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 


	if (!cq->rq.count) {

		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive queue not initialized.\n");

		ret_code = ICE_ERR_AQ_EMPTY;

		ret_code = -EIO;

		goto clean_rq_elem_err;

	}
@@ -1185,7 +1181,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 


	if (ntu == ntc) {

		/* nothing to do - shouldn't need to update ring's values */

		ret_code = ICE_ERR_AQ_NO_WORK;

		ret_code = -EALREADY;

		goto clean_rq_elem_out;

	}
@@ -1196,7 +1192,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 
	rq_last_status = (enum ice_aq_err)le16_to_cpu(desc->retval);

	flags = le16_to_cpu(desc->flags);

	if (flags & ICE_AQ_FLAG_ERR) {

		ret_code = ICE_ERR_AQ_ERROR;

		ret_code = -EIO;

		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",

			  le16_to_cpu(desc->opcode), rq_last_status);

	}