Commit 5a1adb37 authored by Yazen Ghannam's avatar Yazen Ghannam Committed by Borislav Petkov (AMD)
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EDAC/amd64: Do not discover ECC symbol size for Family 17h and later 



The ECC symbol size was needed on legacy system to lookup the ECC syndrome.
This is not needed on modern systems because the ECC syndrome is explicitly
provided in the MCA information.

Remove the ECC symbol size discovery code for modern UMC-based systems.

Signed-off-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230127170419.1824692-10-yazen.ghannam@amd.com
parent a2e59ab8

drivers/edac/amd64_edac.c

+3 −18
Original line number Diff line number Diff line
@@ -1600,6 +1600,8 @@ static void __dump_misc_regs(struct amd64_pvt *pvt) 
		debug_dump_dramcfg_low(pvt, pvt->dclr1, 1);



	edac_dbg(1, "  DramHoleValid: %s\n", dhar_valid(pvt) ? "yes" : "no");



	amd64_info("using x%u syndromes.\n", pvt->ecc_sym_sz);

}



/* Display and decode various NB registers for debug purposes. */
@@ -1609,8 +1611,6 @@ static void dump_misc_regs(struct amd64_pvt *pvt) 
		__dump_misc_regs_df(pvt);

	else

		__dump_misc_regs(pvt);



	amd64_info("using x%u syndromes.\n", pvt->ecc_sym_sz);

}



/*
@@ -3197,22 +3197,7 @@ static void determine_ecc_sym_sz(struct amd64_pvt *pvt) 
{

	pvt->ecc_sym_sz = 4;



	if (pvt->umc) {

		u8 i;



		for_each_umc(i) {

			/* Check enabled channels only: */

			if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) {

				if (pvt->umc[i].ecc_ctrl & BIT(9)) {

					pvt->ecc_sym_sz = 16;

					return;

				} else if (pvt->umc[i].ecc_ctrl & BIT(7)) {

					pvt->ecc_sym_sz = 8;

					return;

				}

			}

		}

	} else if (pvt->fam >= 0x10) {

	if (pvt->fam >= 0x10) {

		u32 tmp;



		amd64_read_pci_cfg(pvt->F3, EXT_NB_MCA_CFG, &tmp);