Commit 5a1977fc authored by Zicheng Qu's avatar Zicheng Qu Committed by Guo Mengqi
Browse files

staging: iio: frequency: ad9832: fix division by zero in ad9832_calc_freqreg() 

stable inclusion
from stable-v5.10.229
commit 442f786c5bff8cfd756ebdeaa4aadbf05c22aa5a
category: bugfix
bugzilla: https://gitee.com/src-openeuler/kernel/issues/IB67SG
CVE: CVE-2024-50233

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=442f786c5bff8cfd756ebdeaa4aadbf05c22aa5a

--------------------------------

commit 6bd301819f8f69331a55ae2336c8b111fc933f3d upstream.

In the ad9832_write_frequency() function, clk_get_rate() might return 0.
This can lead to a division by zero when calling ad9832_calc_freqreg().
The check if (fout > (clk_get_rate(st->mclk) / 2)) does not protect
against the case when fout is 0. The ad9832_write_frequency() function
is called from ad9832_write(), and fout is derived from a text buffer,
which can contain any value.

Link: https://lore.kernel.org/all/2024100904-CVE-2024-47663-9bdc@gregkh/


Fixes: ea707584 ("Staging: IIO: DDS: AD9832 / AD9835 driver")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarZicheng Qu <quzicheng@huawei.com>
Reviewed-by: default avatarNuno Sa <nuno.sa@analog.com>
Reviewed-by: default avatarDan Carpenter <dan.carpenter@linaro.org>
Link: https://patch.msgid.link/20241022134354.574614-1-quzicheng@huawei.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarGuo Mengqi <guomengqi3@huawei.com>
parent d51fb86c

drivers/staging/iio/frequency/ad9832.c

+5 −2
Original line number Diff line number Diff line
@@ -129,12 +129,15 @@ static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout) 
static int ad9832_write_frequency(struct ad9832_state *st,

				  unsigned int addr, unsigned long fout)

{

	unsigned long clk_freq;

	unsigned long regval;



	if (fout > (clk_get_rate(st->mclk) / 2))

	clk_freq = clk_get_rate(st->mclk);



	if (!clk_freq || fout > (clk_freq / 2))

		return -EINVAL;



	regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout);

	regval = ad9832_calc_freqreg(clk_freq, fout);



	st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) |

					(addr << ADD_SHIFT) |