Commit 59f37b73 authored by Sam Protsenko's avatar Sam Protsenko Committed by Greg Kroah-Hartman
Browse files

tty: serial: samsung: Remove USI initialization 



USI control is now extracted to the dedicated USI driver. Remove USI
related code from serial driver to avoid conflicts and code duplication.

Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211204195757.8600-4-semen.protsenko@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 35eaa42c

drivers/tty/serial/samsung_tty.c

+4 −32
Original line number Diff line number Diff line
@@ -65,7 +65,6 @@ enum s3c24xx_port_type { 
struct s3c24xx_uart_info {

	char			*name;

	enum s3c24xx_port_type	type;

	bool			has_usi;

	unsigned int		port_type;

	unsigned int		fifosize;

	unsigned long		rx_fifomask;
@@ -1357,28 +1356,6 @@ static int apple_s5l_serial_startup(struct uart_port *port) 
	return ret;

}



static void exynos_usi_init(struct uart_port *port)

{

	struct s3c24xx_uart_port *ourport = to_ourport(port);

	struct s3c24xx_uart_info *info = ourport->info;

	unsigned int val;



	if (!info->has_usi)

		return;



	/* Clear the software reset of USI block (it's set at startup) */

	val = rd_regl(port, USI_CON);

	val &= ~USI_CON_RESET_MASK;

	wr_regl(port, USI_CON, val);

	udelay(1);



	/* Continuously provide the clock to USI IP w/o gating (for Rx mode) */

	val = rd_regl(port, USI_OPTION);

	val &= ~USI_OPTION_HWACG_MASK;

	val |= USI_OPTION_HWACG_CLKREQ_ON;

	wr_regl(port, USI_OPTION, val);

}



/* power power management control */



static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
@@ -1405,8 +1382,6 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, 


		if (!IS_ERR(ourport->baudclk))

			clk_prepare_enable(ourport->baudclk);



		exynos_usi_init(port);

		break;

	default:

		dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level);
@@ -2130,8 +2105,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, 
	if (ret)

		pr_warn("uart: failed to enable baudclk\n");



	exynos_usi_init(port);



	/* Keep all interrupts masked and cleared */

	switch (ourport->info->type) {

	case TYPE_S3C6400:
@@ -2780,11 +2753,10 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { 
#endif



#if defined(CONFIG_ARCH_EXYNOS)

#define EXYNOS_COMMON_SERIAL_DRV_DATA(_has_usi)			\

#define EXYNOS_COMMON_SERIAL_DRV_DATA()				\

	.info = &(struct s3c24xx_uart_info) {			\

		.name		= "Samsung Exynos UART",	\

		.type		= TYPE_S3C6400,			\

		.has_usi	= _has_usi,			\

		.port_type	= PORT_S3C6400,			\

		.has_divslot	= 1,				\

		.rx_fifomask	= S5PV210_UFSTAT_RXMASK,	\
@@ -2805,17 +2777,17 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { 
	}							\



static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {

	EXYNOS_COMMON_SERIAL_DRV_DATA(false),

	EXYNOS_COMMON_SERIAL_DRV_DATA(),

	.fifosize = { 256, 64, 16, 16 },

};



static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = {

	EXYNOS_COMMON_SERIAL_DRV_DATA(false),

	EXYNOS_COMMON_SERIAL_DRV_DATA(),

	.fifosize = { 64, 256, 16, 256 },

};



static struct s3c24xx_serial_drv_data exynos850_serial_drv_data = {

	EXYNOS_COMMON_SERIAL_DRV_DATA(true),

	EXYNOS_COMMON_SERIAL_DRV_DATA(),

	.fifosize = { 256, 64, 64, 64 },

};

include/linux/serial_s3c.h

+0 −9
Original line number Diff line number Diff line
@@ -27,15 +27,6 @@ 
#define S3C2410_UERSTAT	  (0x14)

#define S3C2410_UFSTAT	  (0x18)

#define S3C2410_UMSTAT	  (0x1C)

#define USI_CON		  (0xC4)

#define USI_OPTION	  (0xC8)



#define USI_CON_RESET			(1<<0)

#define USI_CON_RESET_MASK		(1<<0)



#define USI_OPTION_HWACG_CLKREQ_ON	(1<<1)

#define USI_OPTION_HWACG_CLKSTOP_ON	(1<<2)

#define USI_OPTION_HWACG_MASK		(3<<1)



#define S3C2410_LCON_CFGMASK	  ((0xF<<3)|(0x3))