Commit 59dc7b4f authored by Luiz Angelo Daros de Luca's avatar Luiz Angelo Daros de Luca Committed by David S. Miller
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net: dsa: realtek: rtl8365mb: add support for rtl8_4t



The trailing tag is also supported by this family. The default is still
rtl8_4 but now the switch supports changing the tag to rtl8_4t.

Reintroduce the dropped cpu in struct rtl8365mb (removed by 6147631c).

Signed-off-by: default avatarLuiz Angelo Daros de Luca <luizluca@gmail.com>
Reviewed-by: default avatarAlvin Šipraga <alsi@bang-olufsen.dk>
Reviewed-by: default avatarVladimir Oltean <olteanv@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cd87fecd
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+62 −15
Original line number Diff line number Diff line
@@ -566,6 +566,7 @@ struct rtl8365mb_port {
 * @chip_ver: chip silicon revision
 * @port_mask: mask of all ports
 * @learn_limit_max: maximum number of L2 addresses the chip can learn
 * @cpu: CPU tagging and CPU port configuration for this chip
 * @mib_lock: prevent concurrent reads of MIB counters
 * @ports: per-port data
 * @jam_table: chip-specific initialization jam table
@@ -580,6 +581,7 @@ struct rtl8365mb {
	u32 chip_ver;
	u32 port_mask;
	u32 learn_limit_max;
	struct rtl8365mb_cpu cpu;
	struct mutex mib_lock;
	struct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];
	const struct rtl8365mb_jam_tbl_entry *jam_table;
@@ -782,6 +784,16 @@ static enum dsa_tag_protocol
rtl8365mb_get_tag_protocol(struct dsa_switch *ds, int port,
			   enum dsa_tag_protocol mp)
{
	struct realtek_priv *priv = ds->priv;
	struct rtl8365mb_cpu *cpu;
	struct rtl8365mb *mb;

	mb = priv->chip_data;
	cpu = &mb->cpu;

	if (cpu->position == RTL8365MB_CPU_POS_BEFORE_CRC)
		return DSA_TAG_PROTO_RTL8_4T;

	return DSA_TAG_PROTO_RTL8_4;
}

@@ -1737,8 +1749,10 @@ static void rtl8365mb_irq_teardown(struct realtek_priv *priv)
	}
}

static int rtl8365mb_cpu_config(struct realtek_priv *priv, const struct rtl8365mb_cpu *cpu)
static int rtl8365mb_cpu_config(struct realtek_priv *priv)
{
	struct rtl8365mb *mb = priv->chip_data;
	struct rtl8365mb_cpu *cpu = &mb->cpu;
	u32 val;
	int ret;

@@ -1764,6 +1778,37 @@ static int rtl8365mb_cpu_config(struct realtek_priv *priv, const struct rtl8365m
	return 0;
}

static int rtl8365mb_change_tag_protocol(struct dsa_switch *ds, int cpu_index,
					 enum dsa_tag_protocol proto)
{
	struct realtek_priv *priv = ds->priv;
	struct rtl8365mb_cpu *cpu;
	struct rtl8365mb *mb;

	mb = priv->chip_data;
	cpu = &mb->cpu;

	switch (proto) {
	case DSA_TAG_PROTO_RTL8_4:
		cpu->format = RTL8365MB_CPU_FORMAT_8BYTES;
		cpu->position = RTL8365MB_CPU_POS_AFTER_SA;
		break;
	case DSA_TAG_PROTO_RTL8_4T:
		cpu->format = RTL8365MB_CPU_FORMAT_8BYTES;
		cpu->position = RTL8365MB_CPU_POS_BEFORE_CRC;
		break;
	/* The switch also supports a 4-byte format, similar to rtl4a but with
	 * the same 0x04 8-bit version and probably 8-bit port source/dest.
	 * There is no public doc about it. Not supported yet and it will probably
	 * never be.
	 */
	default:
		return -EPROTONOSUPPORT;
	}

	return rtl8365mb_cpu_config(priv);
}

static int rtl8365mb_switch_init(struct realtek_priv *priv)
{
	struct rtl8365mb *mb = priv->chip_data;
@@ -1810,13 +1855,14 @@ static int rtl8365mb_reset_chip(struct realtek_priv *priv)
static int rtl8365mb_setup(struct dsa_switch *ds)
{
	struct realtek_priv *priv = ds->priv;
	struct rtl8365mb_cpu cpu = {0};
	struct rtl8365mb_cpu *cpu;
	struct dsa_port *cpu_dp;
	struct rtl8365mb *mb;
	int ret;
	int i;

	mb = priv->chip_data;
	cpu = &mb->cpu;

	ret = rtl8365mb_reset_chip(priv);
	if (ret) {
@@ -1839,21 +1885,14 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
		dev_info(priv->dev, "no interrupt support\n");

	/* Configure CPU tagging */
	cpu.trap_port = RTL8365MB_MAX_NUM_PORTS;
	dsa_switch_for_each_cpu_port(cpu_dp, priv->ds) {
		cpu.mask |= BIT(cpu_dp->index);
		cpu->mask |= BIT(cpu_dp->index);

		if (cpu.trap_port == RTL8365MB_MAX_NUM_PORTS)
			cpu.trap_port = cpu_dp->index;
		if (cpu->trap_port == RTL8365MB_MAX_NUM_PORTS)
			cpu->trap_port = cpu_dp->index;
	}

	cpu.enable = cpu.mask > 0;
	cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL;
	cpu.position = RTL8365MB_CPU_POS_AFTER_SA;
	cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;
	cpu.format = RTL8365MB_CPU_FORMAT_8BYTES;

	ret = rtl8365mb_cpu_config(priv, &cpu);
	cpu->enable = cpu->mask > 0;
	ret = rtl8365mb_cpu_config(priv);
	if (ret)
		goto out_teardown_irq;

@@ -1865,7 +1904,7 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
			continue;

		/* Forward only to the CPU */
		ret = rtl8365mb_port_set_isolation(priv, i, cpu.mask);
		ret = rtl8365mb_port_set_isolation(priv, i, cpu->mask);
		if (ret)
			goto out_teardown_irq;

@@ -1995,6 +2034,12 @@ static int rtl8365mb_detect(struct realtek_priv *priv)
		mb->jam_table = rtl8365mb_init_jam_8365mb_vc;
		mb->jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc);

		mb->cpu.trap_port = RTL8365MB_MAX_NUM_PORTS;
		mb->cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL;
		mb->cpu.position = RTL8365MB_CPU_POS_AFTER_SA;
		mb->cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;
		mb->cpu.format = RTL8365MB_CPU_FORMAT_8BYTES;

		break;
	default:
		dev_err(priv->dev,
@@ -2008,6 +2053,7 @@ static int rtl8365mb_detect(struct realtek_priv *priv)

static const struct dsa_switch_ops rtl8365mb_switch_ops_smi = {
	.get_tag_protocol = rtl8365mb_get_tag_protocol,
	.change_tag_protocol = rtl8365mb_change_tag_protocol,
	.setup = rtl8365mb_setup,
	.teardown = rtl8365mb_teardown,
	.phylink_get_caps = rtl8365mb_phylink_get_caps,
@@ -2026,6 +2072,7 @@ static const struct dsa_switch_ops rtl8365mb_switch_ops_smi = {

static const struct dsa_switch_ops rtl8365mb_switch_ops_mdio = {
	.get_tag_protocol = rtl8365mb_get_tag_protocol,
	.change_tag_protocol = rtl8365mb_change_tag_protocol,
	.setup = rtl8365mb_setup,
	.teardown = rtl8365mb_teardown,
	.phylink_get_caps = rtl8365mb_phylink_get_caps,