Commit 5951b62b authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/83xx: Split usb.c 



usb.c contains three independent parts with no common part.

Split it.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Drop usb.o from Makefile to fix build]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/75712b54bf9cb85ab10e47cd2772cd2a098ca895.1692199324.git.christophe.leroy@csgroup.eu
parent d25f01fb

arch/powerpc/platforms/83xx/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
#

# Makefile for the PowerPC 83xx linux kernel.

#

obj-y				:= misc.o usb.o

obj-y				:= misc.o

obj-$(CONFIG_SUSPEND)		+= suspend.o suspend-asm.o

obj-$(CONFIG_MCU_MPC8349EMITX)	+= mcu_mpc8349emitx.o

obj-$(CONFIG_MPC830x_RDB)	+= mpc830x_rdb.o
@@ -13,3 +13,6 @@ obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o 
obj-$(CONFIG_MPC837x_RDB)	+= mpc837x_rdb.o

obj-$(CONFIG_ASP834x)		+= asp834x.o

obj-$(CONFIG_KMETER1)		+= km83xx.o

obj-$(CONFIG_PPC_MPC831x)	+= usb_831x.o

obj-$(CONFIG_PPC_MPC834x)	+= usb_834x.o

obj-$(CONFIG_PPC_MPC837x)	+= usb_837x.o

arch/powerpc/platforms/83xx/usb.c→arch/powerpc/platforms/83xx/usb_831x.c

+0 −118
Original line number Diff line number Diff line
@@ -17,81 +17,6 @@ 


#include "mpc83xx.h"



#ifdef CONFIG_PPC_MPC834x

int __init mpc834x_usb_cfg(void)

{

	unsigned long sccr, sicrl, sicrh;

	void __iomem *immap;

	struct device_node *np = NULL;

	int port0_is_dr = 0, port1_is_dr = 0;

	const void *prop, *dr_mode;



	immap = ioremap(get_immrbase(), 0x1000);

	if (!immap)

		return -ENOMEM;



	/* Read registers */

	/* Note: DR and MPH must use the same clock setting in SCCR */

	sccr = in_be32(immap + MPC83XX_SCCR_OFFS) & ~MPC83XX_SCCR_USB_MASK;

	sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;

	sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;



	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

	if (np) {

		sccr |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */



		prop = of_get_property(np, "phy_type", NULL);

		port1_is_dr = 1;

		if (prop &&

		    (!strcmp(prop, "utmi") || !strcmp(prop, "utmi_wide"))) {

			sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

			sicrh |= MPC834X_SICRH_USB_UTMI;

			port0_is_dr = 1;

		} else if (prop && !strcmp(prop, "serial")) {

			dr_mode = of_get_property(np, "dr_mode", NULL);

			if (dr_mode && !strcmp(dr_mode, "otg")) {

				sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

				port0_is_dr = 1;

			} else {

				sicrl |= MPC834X_SICRL_USB1;

			}

		} else if (prop && !strcmp(prop, "ulpi")) {

			sicrl |= MPC834X_SICRL_USB1;

		} else {

			pr_warn("834x USB PHY type not supported\n");

		}

		of_node_put(np);

	}

	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");

	if (np) {

		sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */



		prop = of_get_property(np, "port0", NULL);

		if (prop) {

			if (port0_is_dr)

				pr_warn("834x USB port0 can't be used by both DR and MPH!\n");

			sicrl &= ~MPC834X_SICRL_USB0;

		}

		prop = of_get_property(np, "port1", NULL);

		if (prop) {

			if (port1_is_dr)

				pr_warn("834x USB port1 can't be used by both DR and MPH!\n");

			sicrl &= ~MPC834X_SICRL_USB1;

		}

		of_node_put(np);

	}



	/* Write back */

	out_be32(immap + MPC83XX_SCCR_OFFS, sccr);

	out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);

	out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);



	iounmap(immap);

	return 0;

}

#endif /* CONFIG_PPC_MPC834x */



#ifdef CONFIG_PPC_MPC831x

int __init mpc831x_usb_cfg(void)

{

	u32 temp;
@@ -201,46 +126,3 @@ int __init mpc831x_usb_cfg(void) 
	of_node_put(np);

	return ret;

}
 
#endif /* CONFIG_PPC_MPC831x */



#ifdef CONFIG_PPC_MPC837x

int __init mpc837x_usb_cfg(void)

{

	void __iomem *immap;

	struct device_node *np = NULL;

	const void *prop;

	int ret = 0;



	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

	if (!np || !of_device_is_available(np)) {

		of_node_put(np);

		return -ENODEV;

	}

	prop = of_get_property(np, "phy_type", NULL);



	if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {

		pr_warn("837x USB PHY type not supported\n");

		of_node_put(np);

		return -EINVAL;

	}



	/* Map IMMR space for pin and clock settings */

	immap = ioremap(get_immrbase(), 0x1000);

	if (!immap) {

		of_node_put(np);

		return -ENOMEM;

	}



	/* Configure clock */

	clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,

			MPC837X_SCCR_USB_DRCM_11);



	/* Configure pin mux for ULPI/serial */

	clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,

			MPC837X_SICRL_USB_ULPI);



	iounmap(immap);

	of_node_put(np);

	return ret;

}

#endif /* CONFIG_PPC_MPC837x */

arch/powerpc/platforms/83xx/usb_834x.c

0 → 100644
+90 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Freescale 83xx USB SOC setup code

 *

 * Copyright (C) 2007 Freescale Semiconductor, Inc.

 * Author: Li Yang

 */



#include <linux/stddef.h>

#include <linux/kernel.h>

#include <linux/errno.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/io.h>



#include <sysdev/fsl_soc.h>



#include "mpc83xx.h"



int __init mpc834x_usb_cfg(void)

{

	unsigned long sccr, sicrl, sicrh;

	void __iomem *immap;

	struct device_node *np = NULL;

	int port0_is_dr = 0, port1_is_dr = 0;

	const void *prop, *dr_mode;



	immap = ioremap(get_immrbase(), 0x1000);

	if (!immap)

		return -ENOMEM;



	/* Read registers */

	/* Note: DR and MPH must use the same clock setting in SCCR */

	sccr = in_be32(immap + MPC83XX_SCCR_OFFS) & ~MPC83XX_SCCR_USB_MASK;

	sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;

	sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;



	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

	if (np) {

		sccr |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */



		prop = of_get_property(np, "phy_type", NULL);

		port1_is_dr = 1;

		if (prop &&

		    (!strcmp(prop, "utmi") || !strcmp(prop, "utmi_wide"))) {

			sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

			sicrh |= MPC834X_SICRH_USB_UTMI;

			port0_is_dr = 1;

		} else if (prop && !strcmp(prop, "serial")) {

			dr_mode = of_get_property(np, "dr_mode", NULL);

			if (dr_mode && !strcmp(dr_mode, "otg")) {

				sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

				port0_is_dr = 1;

			} else {

				sicrl |= MPC834X_SICRL_USB1;

			}

		} else if (prop && !strcmp(prop, "ulpi")) {

			sicrl |= MPC834X_SICRL_USB1;

		} else {

			pr_warn("834x USB PHY type not supported\n");

		}

		of_node_put(np);

	}

	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");

	if (np) {

		sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */



		prop = of_get_property(np, "port0", NULL);

		if (prop) {

			if (port0_is_dr)

				pr_warn("834x USB port0 can't be used by both DR and MPH!\n");

			sicrl &= ~MPC834X_SICRL_USB0;

		}

		prop = of_get_property(np, "port1", NULL);

		if (prop) {

			if (port1_is_dr)

				pr_warn("834x USB port1 can't be used by both DR and MPH!\n");

			sicrl &= ~MPC834X_SICRL_USB1;

		}

		of_node_put(np);

	}



	/* Write back */

	out_be32(immap + MPC83XX_SCCR_OFFS, sccr);

	out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);

	out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);



	iounmap(immap);

	return 0;

}

arch/powerpc/platforms/83xx/usb_837x.c

0 → 100644
+58 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Freescale 83xx USB SOC setup code

 *

 * Copyright (C) 2007 Freescale Semiconductor, Inc.

 * Author: Li Yang

 */



#include <linux/stddef.h>

#include <linux/kernel.h>

#include <linux/errno.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/io.h>



#include <sysdev/fsl_soc.h>



#include "mpc83xx.h"



int __init mpc837x_usb_cfg(void)

{

	void __iomem *immap;

	struct device_node *np = NULL;

	const void *prop;

	int ret = 0;



	np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

	if (!np || !of_device_is_available(np)) {

		of_node_put(np);

		return -ENODEV;

	}

	prop = of_get_property(np, "phy_type", NULL);



	if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {

		pr_warn("837x USB PHY type not supported\n");

		of_node_put(np);

		return -EINVAL;

	}



	/* Map IMMR space for pin and clock settings */

	immap = ioremap(get_immrbase(), 0x1000);

	if (!immap) {

		of_node_put(np);

		return -ENOMEM;

	}



	/* Configure clock */

	clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,

			MPC837X_SCCR_USB_DRCM_11);



	/* Configure pin mux for ULPI/serial */

	clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,

			MPC837X_SICRL_USB_ULPI);



	iounmap(immap);

	of_node_put(np);

	return ret;

}