Commit 5941d003 authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 

ath.git patches for v5.10. Major changes:

ath10k

* support SDIO firmware codedumps

* support station specific TID configurations

ath11k

* add support for IPQ6018
parents 0dc0b5c2 42a08ff7

Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt

+3 −1
Original line number Diff line number Diff line
@@ -65,7 +65,8 @@ Optional properties: 
				     the length can vary between hw versions.

- <supply-name>-supply: handle to the regulator device tree node

			   optional "supply-name" are "vdd-0.8-cx-mx",

			   "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0".

			   "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0",

			   and "vdd-3.3-ch1".

- memory-region:

	Usage: optional

	Value type: <phandle>
@@ -204,6 +205,7 @@ wifi@18000000 { 
		vdd-1.8-xo-supply = <&vreg_l7a_1p8>;

		vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;

		vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;

		vdd-3.3-ch1-supply = <&vreg_l26a_3p3>;

		memory-region = <&wifi_msa_mem>;

		iommus = <&apps_smmu 0x0040 0x1>;

		qcom,msa-fixed-perm;

Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml

+3 −1
Original line number Diff line number Diff line
@@ -17,7 +17,9 @@ description: | 


properties:

  compatible:

    const: qcom,ipq8074-wifi

    enum:

      - qcom,ipq8074-wifi

      - qcom,ipq6018-wifi



  reg:

    maxItems: 1

drivers/net/wireless/ath/ath10k/bmi.c

+2 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ void ath10k_bmi_start(struct ath10k *ar) 


	ar->bmi.done_sent = false;

}

EXPORT_SYMBOL(ath10k_bmi_start);



int ath10k_bmi_done(struct ath10k *ar)

{
@@ -189,6 +190,7 @@ int ath10k_bmi_read_memory(struct ath10k *ar, 


	return 0;

}

EXPORT_SYMBOL(ath10k_bmi_read_memory);



int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val)

{

drivers/net/wireless/ath/ath10k/ce.c

+44 −51
Original line number Diff line number Diff line
@@ -481,15 +481,6 @@ static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar, 
	ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask);

}



static inline bool ath10k_ce_engine_int_status_check(struct ath10k *ar,

						     u32 ce_ctrl_addr,

						     unsigned int mask)

{

	struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs;



	return ath10k_ce_read32(ar, ce_ctrl_addr + wm_regs->addr) & mask;

}



/*

 * Guts of ath10k_ce_send.

 * The caller takes responsibility for any needed locking.
@@ -1308,32 +1299,24 @@ void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id) 
	struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs;

	u32 ctrl_addr = ce_state->ctrl_addr;



	spin_lock_bh(&ce->ce_lock);



	if (ath10k_ce_engine_int_status_check(ar, ctrl_addr,

					      wm_regs->cc_mask)) {

		/* Clear before handling */

	/*

	 * Clear before handling

	 *

	 * Misc CE interrupts are not being handled, but still need

	 * to be cleared.

	 *

	 * NOTE: When the last copy engine interrupt is cleared the

	 * hardware will go to sleep.  Once this happens any access to

	 * the CE registers can cause a hardware fault.

	 */

	ath10k_ce_engine_int_status_clear(ar, ctrl_addr,

						  wm_regs->cc_mask);



		spin_unlock_bh(&ce->ce_lock);

					  wm_regs->cc_mask | wm_regs->wm_mask);



	if (ce_state->recv_cb)

		ce_state->recv_cb(ce_state);



	if (ce_state->send_cb)

		ce_state->send_cb(ce_state);



		spin_lock_bh(&ce->ce_lock);

	}



	/*

	 * Misc CE interrupts are not being handled, but still need

	 * to be cleared.

	 */

	ath10k_ce_engine_int_status_clear(ar, ctrl_addr, wm_regs->wm_mask);



	spin_unlock_bh(&ce->ce_lock);

}

EXPORT_SYMBOL(ath10k_ce_per_engine_service);
@@ -1384,17 +1367,15 @@ static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state) 
	ath10k_ce_watermark_intr_disable(ar, ctrl_addr);

}



int ath10k_ce_disable_interrupts(struct ath10k *ar)

void ath10k_ce_disable_interrupt(struct ath10k *ar, int ce_id)

{

	struct ath10k_ce *ce = ath10k_ce_priv(ar);

	struct ath10k_ce_pipe *ce_state;

	u32 ctrl_addr;

	int ce_id;



	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {

	ce_state  = &ce->ce_states[ce_id];

	if (ce_state->attr_flags & CE_ATTR_POLL)

			continue;

		return;



	ctrl_addr = ath10k_ce_base_address(ar, ce_id);
@@ -1402,27 +1383,39 @@ int ath10k_ce_disable_interrupts(struct ath10k *ar) 
	ath10k_ce_error_intr_disable(ar, ctrl_addr);

	ath10k_ce_watermark_intr_disable(ar, ctrl_addr);

}

EXPORT_SYMBOL(ath10k_ce_disable_interrupt);



	return 0;

void ath10k_ce_disable_interrupts(struct ath10k *ar)

{

	int ce_id;



	for (ce_id = 0; ce_id < CE_COUNT; ce_id++)

		ath10k_ce_disable_interrupt(ar, ce_id);

}

EXPORT_SYMBOL(ath10k_ce_disable_interrupts);



void ath10k_ce_enable_interrupts(struct ath10k *ar)

void ath10k_ce_enable_interrupt(struct ath10k *ar, int ce_id)

{

	struct ath10k_ce *ce = ath10k_ce_priv(ar);

	int ce_id;

	struct ath10k_ce_pipe *ce_state;



	/* Enable interrupts for copy engine that

	 * are not using polling mode.

	 */

	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {

	ce_state  = &ce->ce_states[ce_id];

	if (ce_state->attr_flags & CE_ATTR_POLL)

			continue;

		return;



	ath10k_ce_per_engine_handler_adjust(ce_state);

}

EXPORT_SYMBOL(ath10k_ce_enable_interrupt);



void ath10k_ce_enable_interrupts(struct ath10k *ar)

{

	int ce_id;



	/* Enable interrupts for copy engine that

	 * are not using polling mode.

	 */

	for (ce_id = 0; ce_id < CE_COUNT; ce_id++)

		ath10k_ce_enable_interrupt(ar, ce_id);

}

EXPORT_SYMBOL(ath10k_ce_enable_interrupts);

drivers/net/wireless/ath/ath10k/ce.h

+7 −8
Original line number Diff line number Diff line
@@ -255,10 +255,13 @@ int ath10k_ce_cancel_send_next(struct ath10k_ce_pipe *ce_state, 
/*==================CE Interrupt Handlers====================*/

void ath10k_ce_per_engine_service_any(struct ath10k *ar);

void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id);

int ath10k_ce_disable_interrupts(struct ath10k *ar);

void ath10k_ce_disable_interrupt(struct ath10k *ar, int ce_id);

void ath10k_ce_disable_interrupts(struct ath10k *ar);

void ath10k_ce_enable_interrupt(struct ath10k *ar, int ce_id);

void ath10k_ce_enable_interrupts(struct ath10k *ar);

void ath10k_ce_dump_registers(struct ath10k *ar,

			      struct ath10k_fw_crash_data *crash_data);



void ath10k_ce_alloc_rri(struct ath10k *ar);

void ath10k_ce_free_rri(struct ath10k *ar);
@@ -369,18 +372,14 @@ static inline u32 ath10k_ce_base_address(struct ath10k *ar, unsigned int ce_id) 
	(((x) & CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK) >> \

		CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_LSB)

#define CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS			0x0000

#define CE_INTERRUPT_SUMMARY		(GENMASK(CE_COUNT_MAX - 1, 0))



static inline u32 ath10k_ce_interrupt_summary(struct ath10k *ar)

{

	struct ath10k_ce *ce = ath10k_ce_priv(ar);



	if (!ar->hw_params.per_ce_irq)

	return CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_GET(

		ce->bus_ops->read32((ar), CE_WRAPPER_BASE_ADDRESS +

		CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS));

	else

		return CE_INTERRUPT_SUMMARY;

}



/* Host software's Copy Engine configuration. */