Commit 58fe7320 authored by Chris Packham's avatar Chris Packham Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: Add NAND flash controller to AC5 



The AC5/AC5X SoC has a NAND flash controller (NFC). Add this to
the base SoC dtsi file as a disabled node. The NFC integration
on the AC5/AC5X only supports SDR timing modes up to 3 so requires a
dedicated compatible property so this limitation can be enforced.

Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 7184919b

arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -297,6 +297,16 @@ 
			status = "disabled";

		};



		nand: nand-controller@805b0000 {

			compatible = "marvell,ac5-nand-controller";

			reg =  <0x0 0x805b0000 0x0 0x00000054>;

			#address-cells = <0x1>;

			#size-cells = <0x0>;

			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&nand_clock>;

			status = "disabled";

		};



		gic: interrupt-controller@80600000 {

			compatible = "arm,gic-v3";

			#interrupt-cells = <3>;
@@ -319,5 +329,11 @@ 
			#clock-cells = <0>;

			clock-frequency = <200000000>;

		};



		nand_clock: nand-clock {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <400000000>;

		};

	};

};