Commit 58b964b3 authored by He Chuyue's avatar He Chuyue Committed by guzitao
Browse files

sw64: perf: fix support for dwarf in perf

Sunway inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I56X48



--------------------------------

This patch:
  - Fix the corresponding labels in kernel and perf according to the
    integer register sorting in libunwind.
  - Fix wrong stl and format styles in regs_load.S test program.

Now, we can pass perf test: dwarf.

Signed-off-by: default avatarHe Chuyue <hechuyue@wxiat.com>
Reviewed-by: default avatarHe Sheng <hesheng@wxiat.com>
Signed-off-by: default avatarGu Zitao <guzitao@wxiat.com>
parent 86884051
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+5 −9
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ enum perf_event_sw64_regs {
	PERF_REG_SW64_R13,
	PERF_REG_SW64_R14,
	PERF_REG_SW64_R15,
	PERF_REG_SW64_R16,
	PERF_REG_SW64_R17,
	PERF_REG_SW64_R18,
	PERF_REG_SW64_R19,
	PERF_REG_SW64_R20,
	PERF_REG_SW64_R21,
@@ -30,16 +33,9 @@ enum perf_event_sw64_regs {
	PERF_REG_SW64_R26,
	PERF_REG_SW64_R27,
	PERF_REG_SW64_R28,
	PERF_REG_SW64_HAE,
	PERF_REG_SW64_TRAP_A0,
	PERF_REG_SW64_TRAP_A1,
	PERF_REG_SW64_TRAP_A2,
	PERF_REG_SW64_PS,
	PERF_REG_SW64_PC,
	PERF_REG_SW64_GP,
	PERF_REG_SW64_R16,
	PERF_REG_SW64_R17,
	PERF_REG_SW64_R18,
	PERF_REG_SW64_SP,
	PERF_REG_SW64_PC,
	PERF_REG_SW64_MAX,
};
#endif /* _UAPI_ASM_SW64_PERF_REGS_H */
+12 −9
Original line number Diff line number Diff line
@@ -13,6 +13,16 @@ enum perf_event_sw64_regs {
	PERF_REG_SW64_R6,
	PERF_REG_SW64_R7,
	PERF_REG_SW64_R8,
	PERF_REG_SW64_R9,
	PERF_REG_SW64_R10,
	PERF_REG_SW64_R11,
	PERF_REG_SW64_R12,
	PERF_REG_SW64_R13,
	PERF_REG_SW64_R14,
	PERF_REG_SW64_R15,
	PERF_REG_SW64_R16,
	PERF_REG_SW64_R17,
	PERF_REG_SW64_R18,
	PERF_REG_SW64_R19,
	PERF_REG_SW64_R20,
	PERF_REG_SW64_R21,
@@ -23,16 +33,9 @@ enum perf_event_sw64_regs {
	PERF_REG_SW64_R26,
	PERF_REG_SW64_R27,
	PERF_REG_SW64_R28,
	PERF_REG_SW64_HAE,
	PERF_REG_SW64_TRAP_A0,
	PERF_REG_SW64_TRAP_A1,
	PERF_REG_SW64_TRAP_A2,
	PERF_REG_SW64_PS,
	PERF_REG_SW64_PC,
	PERF_REG_SW64_GP,
	PERF_REG_SW64_R16,
	PERF_REG_SW64_R17,
	PERF_REG_SW64_R18,
	PERF_REG_SW64_SP,
	PERF_REG_SW64_PC,
	PERF_REG_SW64_MAX,
};
#endif /* _ASM_SW64_PERF_REGS_H */
+63 −1
Original line number Diff line number Diff line
@@ -13,13 +13,75 @@ void perf_regs_load(u64 *regs);
#define PERF_SAMPLE_REGS_ABI	PERF_SAMPLE_REGS_ABI_64

#define PERF_REG_IP	PERF_REG_SW64_PC
#define PERF_REG_SP	PERF_REG_SW64_HAE
#define PERF_REG_SP	PERF_REG_SW64_SP

static inline const char *perf_reg_name(int id)
{
	switch (id) {
	case PERF_REG_SW64_R0:
		return "r0";
	case PERF_REG_SW64_R1:
		return "r1";
	case PERF_REG_SW64_R2:
		return "r2";
	case PERF_REG_SW64_R3:
		return "r3";
	case PERF_REG_SW64_R4:
		return "r4";
	case PERF_REG_SW64_R5:
		return "r5";
	case PERF_REG_SW64_R6:
		return "r6";
	case PERF_REG_SW64_R7:
		return "r7";
	case PERF_REG_SW64_R8:
		return "r8";
	case PERF_REG_SW64_R9:
		return "r9";
	case PERF_REG_SW64_R10:
		return "r10";
	case PERF_REG_SW64_R11:
		return "r11";
	case PERF_REG_SW64_R12:
		return "r12";
	case PERF_REG_SW64_R13:
		return "r13";
	case PERF_REG_SW64_R14:
		return "r14";
	case PERF_REG_SW64_R15:
		return "r15";
	case PERF_REG_SW64_R16:
		return "r16";
	case PERF_REG_SW64_R17:
		return "r17";
	case PERF_REG_SW64_R18:
		return "r18";
	case PERF_REG_SW64_R19:
		return "r19";
	case PERF_REG_SW64_R20:
		return "r20";
	case PERF_REG_SW64_R21:
		return "r21";
	case PERF_REG_SW64_R22:
		return "r22";
	case PERF_REG_SW64_R23:
		return "r23";
	case PERF_REG_SW64_R24:
		return "r24";
	case PERF_REG_SW64_R25:
		return "r25";
	case PERF_REG_SW64_R26:
		return "r26";
	case PERF_REG_SW64_R27:
		return "r27";
	case PERF_REG_SW64_R28:
		return "r28";
	case PERF_REG_SW64_GP:
		return "gp";
	case PERF_REG_SW64_SP:
		return "sp";
	case PERF_REG_SW64_PC:
		return "pc";
	default:
		return NULL;
	}
+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ static int sample_ustack(struct perf_sample *sample,
		return -1;
	}

	sp = (unsigned long) regs[30];
	sp = (unsigned long) regs[PERF_REG_SW64_SP];

	map = maps__find(thread->maps, (u64)sp);
	if (!map) {
+38 −29
Original line number Diff line number Diff line
@@ -4,35 +4,44 @@
.text
.set noat
.type perf_regs_load,%function
#define STL_REG(r)	stl $r, (8 * r)($16)
#define LDL_REG(r)	ldl $r, (8 * r)($16)
#define SP	(8 * 30)
#define PC	(8 * 31)
SYM_FUNC_START(perf_regs_load)
	stl $0, 0x0($16);
	stl $1, 0x8($16);
	stl $2, 0x10($16);
	stl $3, 0x18($16);
	stl $4, 0x20($16);
	stl $5, 0x28($16);
	stl $6, 0x30($16);
	stl $7, 0x38($16);
	stl $8, 0x40($16);
	stl $19, 0x48($16);
	stl $20, 0x50($16);
	stl $21, 0x58($16);
	stl $22, 0x60($16);
	stl $23, 0x68($16);
	stl $24, 0x70($16);
	stl $25, 0x78($16);
	stl $26, 0x80($16);
	stl $27, 0x88($16);
	stl $28, 0x90($16);
	stl $30, 0x98($16);
	stl $20, 0xa0($16);
	stl $21, 0xa8($16);
	stl $22, 0xb0($16);
	stl $23, 0xb8($16);
	stl $26, 0xc0($16);
	stl $29, 0xc8($16);
	stl $16, 0xd0($16);
	stl $17, 0xd8($16);
	stl $18, 0xe0($16);
	STL_REG(0)
	STL_REG(1)
	STL_REG(2)
	STL_REG(3)
	STL_REG(4)
	STL_REG(5)
	STL_REG(6)
	STL_REG(7)
	STL_REG(8)
	STL_REG(9)
	STL_REG(10)
	STL_REG(11)
	STL_REG(12)
	STL_REG(13)
	STL_REG(14)
	STL_REG(15)
	STL_REG(16)
	STL_REG(17)
	STL_REG(18)
	STL_REG(19)
	STL_REG(20)
	STL_REG(21)
	STL_REG(22)
	STL_REG(23)
	STL_REG(24)
	STL_REG(25)
	STL_REG(26)
	STL_REG(27)
	STL_REG(28)
	STL_REG(29)
	mov $30, $17
	stl $17, (SP)($16)
	stl $26, (PC)($16)
	LDL_REG(17)
	ret
SYM_FUNC_END(perf_regs_load)
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