Commit 5874cabe authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/64: only book3s/64 supports CONFIG_PPC_64K_PAGES 



CONFIG_PPC_64K_PAGES cannot be selected by nohash/64.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent a521c44c

arch/powerpc/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -375,7 +375,6 @@ config ZONE_DMA 
config PGTABLE_LEVELS

	int

	default 2 if !PPC64

	default 3 if PPC_64K_PAGES && !PPC_BOOK3S_64

	default 4



source "arch/powerpc/sysdev/Kconfig"

arch/powerpc/include/asm/nohash/64/pgalloc.h

+0 −3
Original line number Diff line number Diff line
@@ -171,12 +171,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table, 


#define __pmd_free_tlb(tlb, pmd, addr)		      \

	pgtable_free_tlb(tlb, pmd, PMD_CACHE_INDEX)

#ifndef CONFIG_PPC_64K_PAGES

#define __pud_free_tlb(tlb, pud, addr)		      \

	pgtable_free_tlb(tlb, pud, PUD_INDEX_SIZE)



#endif /* CONFIG_PPC_64K_PAGES */



#define check_pgt_cache()	do { } while (0)



#endif /* _ASM_POWERPC_PGALLOC_64_H */

arch/powerpc/include/asm/nohash/64/pgtable.h

+0 −4
Original line number Diff line number Diff line
@@ -10,10 +10,6 @@ 
#include <asm/barrier.h>

#include <asm/asm-const.h>



#ifdef CONFIG_PPC_64K_PAGES

#error "Page size not supported"

#endif



#define FIRST_USER_ADDRESS	0UL



/*

arch/powerpc/include/asm/nohash/pte-book3e.h

+0 −5
Original line number Diff line number Diff line
@@ -60,13 +60,8 @@ 
#define _PAGE_SPECIAL	_PAGE_SW0



/* Base page size */

#ifdef CONFIG_PPC_64K_PAGES

#define _PAGE_PSIZE	_PAGE_PSIZE_64K

#define PTE_RPN_SHIFT	(28)

#else

#define _PAGE_PSIZE	_PAGE_PSIZE_4K

#define	PTE_RPN_SHIFT	(24)

#endif



#define PTE_WIMGE_SHIFT (19)

#define PTE_BAP_SHIFT	(2)

arch/powerpc/include/asm/pgtable-be-types.h

+2 −7
Original line number Diff line number Diff line
@@ -33,11 +33,7 @@ static inline __be64 pmd_raw(pmd_t x) 
	return x.pmd;

}



/*

 * 64 bit hash always use 4 level table. Everybody else use 4 level

 * only for 4K page size.

 */

#if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES)

/* 64 bit always use 4 level table. */

typedef struct { __be64 pud; } pud_t;

#define __pud(x)	((pud_t) { cpu_to_be64(x) })

#define __pud_raw(x)	((pud_t) { (x) })
@@ -51,7 +47,6 @@ static inline __be64 pud_raw(pud_t x) 
	return x.pud;

}



#endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */

#endif /* CONFIG_PPC64 */



/* PGD level */
@@ -77,7 +72,7 @@ typedef struct { unsigned long pgprot; } pgprot_t; 
 * With hash config 64k pages additionally define a bigger "real PTE" type that

 * gathers the "second half" part of the PTE for pseudo 64k pages

 */

#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_BOOK3S_64)

#ifdef CONFIG_PPC_64K_PAGES

typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;

#else

typedef struct { pte_t pte; } real_pte_t;