Commit 58065a1e authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher
Browse files

drm/amd/display: Update swizzle mode enums 



[Why]
Swizzle mode enum for DC_SW_VAR_R_X was existing,
but not mapped correctly.

[How]
Update mapping and conversion for DC_SW_VAR_R_X.

Reviewed-by: default avatarXiangBing Foo <XiangBing.Foo@amd.com>
Reviewed-by: default avatarMartin Leung <Martin.Leung@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Cc: stable@vger.kernel.org
Tested-by: default avatarDaniel Wheeler <Daniel.Wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 94b1c9c7

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+3 −1
Original line number Diff line number Diff line
@@ -1856,7 +1856,9 @@ static void swizzle_to_dml_params( 
	case DC_SW_VAR_D_X:

		*sw_mode = dm_sw_var_d_x;

		break;



	case DC_SW_VAR_R_X:

		*sw_mode = dm_sw_var_r_x;

		break;

	default:

		ASSERT(0); /* Not supported */

		break;

drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h

+2 −2
Original line number Diff line number Diff line
@@ -80,11 +80,11 @@ enum dm_swizzle_mode { 
	dm_sw_SPARE_13 = 24,

	dm_sw_64kb_s_x = 25,

	dm_sw_64kb_d_x = 26,

	dm_sw_SPARE_14 = 27,

	dm_sw_64kb_r_x = 27,

	dm_sw_SPARE_15 = 28,

	dm_sw_var_s_x = 29,

	dm_sw_var_d_x = 30,

	dm_sw_64kb_r_x,

	dm_sw_var_r_x = 31,

	dm_sw_gfx7_2d_thin_l_vp,

	dm_sw_gfx7_2d_thin_gl,

};