Commit 57d00d43 authored by Subbaraya Sundeep's avatar Subbaraya Sundeep Committed by Paolo Abeni
Browse files

octeontx2-pf: mcs: Match macsec ethertype along with DMAC 



On CN10KB silicon a single hardware macsec block is
present and offloads macsec operations for all the
ethernet LMACs. TCAM match with macsec ethertype 0x88e5
alone at RX side is not sufficient to distinguish all the
macsec interfaces created on top of netdevs. Hence append
the DMAC of the macsec interface too. Otherwise the first
created macsec interface only receives all the macsec traffic.

Fixes: c54ffc73 ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading")
Signed-off-by: default avatarSubbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Reviewed-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 699af748

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

+9 −1
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <net/macsec.h>

#include "otx2_common.h"



#define MCS_TCAM0_MAC_DA_MASK		GENMASK_ULL(47, 0)

#define MCS_TCAM0_MAC_SA_MASK		GENMASK_ULL(63, 48)

#define MCS_TCAM1_MAC_SA_MASK		GENMASK_ULL(31, 0)

#define MCS_TCAM1_ETYPE_MASK		GENMASK_ULL(47, 32)
@@ -237,8 +238,10 @@ static int cn10k_mcs_write_rx_flowid(struct otx2_nic *pfvf, 
				     struct cn10k_mcs_rxsc *rxsc, u8 hw_secy_id)

{

	struct macsec_rx_sc *sw_rx_sc = rxsc->sw_rxsc;

	struct macsec_secy *secy = rxsc->sw_secy;

	struct mcs_flowid_entry_write_req *req;

	struct mbox *mbox = &pfvf->mbox;

	u64 mac_da;

	int ret;



	mutex_lock(&mbox->lock);
@@ -249,11 +252,16 @@ static int cn10k_mcs_write_rx_flowid(struct otx2_nic *pfvf, 
		goto fail;

	}



	mac_da = ether_addr_to_u64(secy->netdev->dev_addr);



	req->data[0] = FIELD_PREP(MCS_TCAM0_MAC_DA_MASK, mac_da);

	req->mask[0] = ~0ULL;

	req->mask[0] = ~MCS_TCAM0_MAC_DA_MASK;



	req->data[1] = FIELD_PREP(MCS_TCAM1_ETYPE_MASK, ETH_P_MACSEC);

	req->mask[1] = ~0ULL;

	req->mask[1] &= ~MCS_TCAM1_ETYPE_MASK;



	req->mask[0] = ~0ULL;

	req->mask[2] = ~0ULL;

	req->mask[3] = ~0ULL;