Commit 57806b28 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'octeontx2-trusted-vf' 



Naveen Mamindlapalli says:

====================
octeontx2: Add trusted VF support

This series adds support for trusted VF. The trusted VF support
allows VFs to perform priviliged operations such as setting VF
interface in promiscuous mode, all-multicast mode and also
changing the VF MAC address even if it was asssigned by PF.

Patches #1 and #2 provides the necessary functionality for supporting
promiscuous and multicast packets on both the PF and VF.

Patches #3 and #4 enable trusted VF configuration support.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 52e597d3 b1dc2040

drivers/net/ethernet/marvell/octeontx2/af/common.h

+5 −0
Original line number Diff line number Diff line
@@ -197,6 +197,11 @@ enum nix_scheduler { 


#define SDP_CHANNELS			256



/* The mask is to extract lower 10-bits of channel number

 * which CPT will pass to X2P.

 */

#define NIX_CHAN_CPT_X2P_MASK          (0x3ffull)



/* NIX LSO format indices.

 * As of now TSO is the only one using, so statically assigning indices.

 */

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+13 −1
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ M(MSIX_OFFSET, 0x005, msix_offset, msg_req, msix_offset_rsp) \ 
M(VF_FLR,		0x006, vf_flr, msg_req, msg_rsp)		\

M(PTP_OP,		0x007, ptp_op, ptp_req, ptp_rsp)		\

M(GET_HW_CAP,		0x008, get_hw_cap, msg_req, get_hw_cap_rsp)	\

M(SET_VF_PERM,		0x00b, set_vf_perm, set_vf_perm, msg_rsp)	\

/* CGX mbox IDs (range 0x200 - 0x3FF) */				\

M(CGX_START_RXTX,	0x200, cgx_start_rxtx, msg_req, msg_rsp)	\

M(CGX_STOP_RXTX,	0x201, cgx_stop_rxtx, msg_req, msg_rsp)		\
@@ -611,7 +612,9 @@ enum nix_af_status { 
	NIX_AF_INVAL_SSO_PF_FUNC    = -420,

	NIX_AF_ERR_TX_VTAG_NOSPC    = -421,

	NIX_AF_ERR_RX_VTAG_INUSE    = -422,

	NIX_AF_ERR_NPC_KEY_NOT_SUPP = -423,

	NIX_AF_ERR_PTP_CONFIG_FAIL  = -423,

	NIX_AF_ERR_NPC_KEY_NOT_SUPP = -424,

	NIX_AF_ERR_INVALID_NIXBLK   = -425,

};



/* For NIX RX vtag action  */
@@ -913,6 +916,7 @@ struct nix_rx_mode { 
#define NIX_RX_MODE_UCAST	BIT(0)

#define NIX_RX_MODE_PROMISC	BIT(1)

#define NIX_RX_MODE_ALLMULTI	BIT(2)

#define NIX_RX_MODE_USE_MCE	BIT(3)

	u16	mode;

};
@@ -1228,6 +1232,14 @@ struct ptp_rsp { 
	u64 clk;

};



struct set_vf_perm  {

	struct  mbox_msghdr hdr;

	u16	vf;

#define RESET_VF_PERM		BIT_ULL(0)

#define	VF_TRUSTED		BIT_ULL(1)

	u64	flags;

};



/* CPT mailbox error codes

 * Range 901 - 1000.

 */

drivers/net/ethernet/marvell/octeontx2/af/npc.h

+2 −1
Original line number Diff line number Diff line
@@ -438,7 +438,8 @@ struct nix_tx_action { 
/* NPC MCAM reserved entry index per nixlf */

#define NIXLF_UCAST_ENTRY	0

#define NIXLF_BCAST_ENTRY	1

#define NIXLF_PROMISC_ENTRY	2

#define NIXLF_ALLMULTI_ENTRY	2

#define NIXLF_PROMISC_ENTRY	3



struct npc_coalesced_kpu_prfl {

#define NPC_SIGN	0x00666f727063706e

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+42 −0
Original line number Diff line number Diff line
@@ -1758,6 +1758,48 @@ int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req, 
	return 0;

}



int rvu_mbox_handler_set_vf_perm(struct rvu *rvu, struct set_vf_perm *req,

				 struct msg_rsp *rsp)

{

	struct rvu_hwinfo *hw = rvu->hw;

	u16 pcifunc = req->hdr.pcifunc;

	struct rvu_pfvf *pfvf;

	int blkaddr, nixlf;

	u16 target;



	/* Only PF can add VF permissions */

	if ((pcifunc & RVU_PFVF_FUNC_MASK) || is_afvf(pcifunc))

		return -EOPNOTSUPP;



	target = (pcifunc & ~RVU_PFVF_FUNC_MASK) | (req->vf + 1);

	pfvf = rvu_get_pfvf(rvu, target);



	if (req->flags & RESET_VF_PERM) {

		pfvf->flags &= RVU_CLEAR_VF_PERM;

	} else if (test_bit(PF_SET_VF_TRUSTED, &pfvf->flags) ^

		 (req->flags & VF_TRUSTED)) {

		change_bit(PF_SET_VF_TRUSTED, &pfvf->flags);

		/* disable multicast and promisc entries */

		if (!test_bit(PF_SET_VF_TRUSTED, &pfvf->flags)) {

			blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, target);

			if (blkaddr < 0)

				return 0;

			nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],

					   target, 0);

			if (nixlf < 0)

				return 0;

			npc_enadis_default_mce_entry(rvu, target, nixlf,

						     NIXLF_ALLMULTI_ENTRY,

						     false);

			npc_enadis_default_mce_entry(rvu, target, nixlf,

						     NIXLF_PROMISC_ENTRY,

						     false);

		}

	}



	return 0;

}



static int rvu_process_mbox_msg(struct otx2_mbox *mbox, int devid,

				struct mbox_msghdr *req)

{

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+46 −9
Original line number Diff line number Diff line
@@ -223,13 +223,17 @@ struct rvu_pfvf { 
	u16		maxlen;

	u16		minlen;



	u8		pf_set_vf_cfg;

	u8		mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */

	u8		default_mac[ETH_ALEN]; /* MAC address from FWdata */



	/* Broadcast pkt replication info */

	/* Broadcast/Multicast/Promisc pkt replication info */

	u16			bcast_mce_idx;

	u16			mcast_mce_idx;

	u16			promisc_mce_idx;

	struct nix_mce_list	bcast_mce_list;

	struct nix_mce_list	mcast_mce_list;

	struct nix_mce_list	promisc_mce_list;

	bool			use_mce_list;



	struct rvu_npc_mcam_rule *def_ucast_rule;
@@ -239,8 +243,18 @@ struct rvu_pfvf { 
	u8	nix_blkaddr; /* BLKADDR_NIX0/1 assigned to this PF */

	u8	nix_rx_intf; /* NIX0_RX/NIX1_RX interface to NPC */

	u8	nix_tx_intf; /* NIX0_TX/NIX1_TX interface to NPC */

	unsigned long flags;

};



enum rvu_pfvf_flags {

	NIXLF_INITIALIZED = 0,

	PF_SET_VF_MAC,

	PF_SET_VF_CFG,

	PF_SET_VF_TRUSTED,

};



#define RVU_CLEAR_VF_PERM  ~GENMASK(PF_SET_VF_TRUSTED, PF_SET_VF_MAC)



struct nix_txsch {

	struct rsrc_bmap schq;

	u8   lvl;
@@ -548,11 +562,16 @@ static inline u16 rvu_nix_chan_cpt(struct rvu *rvu, u8 chan) 
/* Function Prototypes

 * RVU

 */

static inline int is_afvf(u16 pcifunc)

static inline bool is_afvf(u16 pcifunc)

{

	return !(pcifunc & ~RVU_PFVF_FUNC_MASK);

}



static inline bool is_vf(u16 pcifunc)

{

	return !!(pcifunc & RVU_PFVF_FUNC_MASK);

}



/* check if PF_FUNC is AF */

static inline bool is_pffunc_af(u16 pcifunc)

{
@@ -608,6 +627,12 @@ static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id) 
	*lmac_id = (map & 0xF);

}



static inline bool is_cgx_vf(struct rvu *rvu, u16 pcifunc)

{

	return ((pcifunc & RVU_PFVF_FUNC_MASK) &&

		is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)));

}



#define M(_name, _id, fn_name, req, rsp)				\

int rvu_mbox_handler_ ## fn_name(struct rvu *, struct req *, struct rsp *);

MBOX_MESSAGES
@@ -637,10 +662,16 @@ void rvu_nix_freemem(struct rvu *rvu); 
int rvu_get_nixlf_count(struct rvu *rvu);

void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int npalf);

int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr);

int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add);

int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,

			struct nix_mce_list *mce_list,

			int mce_idx, int mcam_index, bool add);

void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,

		      struct nix_mce_list **mce_list, int *mce_idx);

struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr);

int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr);

void rvu_nix_reset_mac(struct rvu_pfvf *pfvf, int pcifunc);

int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,

			struct nix_hw **nix_hw, int *blkaddr);



/* NPC APIs */

int rvu_npc_init(struct rvu *rvu);
@@ -651,13 +682,19 @@ int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en); 
void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,

				 int nixlf, u64 chan, u8 *mac_addr);

void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,

				   int nixlf, u64 chan, u8 chan_cnt,

				   bool allmulti);

void rvu_npc_disable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf);

void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf);

				   int nixlf, u64 chan, u8 chan_cnt);

void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

				  bool enable);

void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,

				       int nixlf, u64 chan);

void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, bool enable);

void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

				bool enable);

void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

				    u64 chan);

void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

				   bool enable);

void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,

				  int nixlf, int type, bool enable);

void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);