Commit 57135c28 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'renesas-pinctrl-for-v5.16-tag2' of... 

Merge tag 'renesas-pinctrl-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.16 (take two)

  - Add MediaLB pins on R-Car H3, M3-W/W+, and M3-N.
  - Miscellaneous fixes and improvements.
parents c30174d3 f4e260bf

drivers/pinctrl/renesas/core.c

+45 −28
Original line number Diff line number Diff line
@@ -675,7 +675,9 @@ static unsigned int sh_pfc_walk_regs(struct sh_pfc *pfc, 
			do_reg(pfc, pfc->info->drive_regs[i].reg, n++);



	if (pfc->info->bias_regs)

		for (i = 0; pfc->info->bias_regs[i].puen; i++) {

		for (i = 0; pfc->info->bias_regs[i].puen ||

			    pfc->info->bias_regs[i].pud; i++) {

			if (pfc->info->bias_regs[i].puen)

				do_reg(pfc, pfc->info->bias_regs[i].puen, n++);

			if (pfc->info->bias_regs[i].pud)

				do_reg(pfc, pfc->info->bias_regs[i].pud, n++);
@@ -743,7 +745,10 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; } 


static unsigned int sh_pfc_errors __initdata;

static unsigned int sh_pfc_warnings __initdata;

static u32 *sh_pfc_regs __initdata;

static struct {

	u32 reg;

	u32 bits;

} *sh_pfc_regs __initdata;

static u32 sh_pfc_num_regs __initdata;

static u16 *sh_pfc_enums __initdata;

static u32 sh_pfc_num_enums __initdata;
@@ -778,13 +783,19 @@ static bool __init same_name(const char *a, const char *b) 
	return !strcmp(a, b);

}



static void __init sh_pfc_check_reg(const char *drvname, u32 reg)

static void __init sh_pfc_check_reg(const char *drvname, u32 reg, u32 bits)

{

	unsigned int i;



	for (i = 0; i < sh_pfc_num_regs; i++)

		if (reg == sh_pfc_regs[i]) {

			sh_pfc_err("reg 0x%x conflict\n", reg);

	for (i = 0; i < sh_pfc_num_regs; i++) {

		if (reg != sh_pfc_regs[i].reg)

			continue;



		if (bits & sh_pfc_regs[i].bits)

			sh_pfc_err("reg 0x%x: bits 0x%x conflict\n", reg,

				   bits & sh_pfc_regs[i].bits);



		sh_pfc_regs[i].bits |= bits;

		return;

	}
@@ -793,7 +804,9 @@ static void __init sh_pfc_check_reg(const char *drvname, u32 reg) 
		return;

	}



	sh_pfc_regs[sh_pfc_num_regs++] = reg;

	sh_pfc_regs[sh_pfc_num_regs].reg = reg;

	sh_pfc_regs[sh_pfc_num_regs].bits = bits;

	sh_pfc_num_regs++;

}



static int __init sh_pfc_check_enum(const char *drvname, u16 enum_id)
@@ -848,7 +861,8 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname, 
{

	unsigned int i, n, rw, fw;



	sh_pfc_check_reg(drvname, cfg_reg->reg);

	sh_pfc_check_reg(drvname, cfg_reg->reg,

			 GENMASK(cfg_reg->reg_width - 1, 0));



	if (cfg_reg->field_width) {

		n = cfg_reg->reg_width / cfg_reg->field_width;
@@ -879,22 +893,17 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname, 
static void __init sh_pfc_check_drive_reg(const struct sh_pfc_soc_info *info,

					  const struct pinmux_drive_reg *drive)

{

	const char *drvname = info->name;

	unsigned long seen = 0, mask;

	unsigned int i;



	sh_pfc_check_reg(info->name, drive->reg);

	for (i = 0; i < ARRAY_SIZE(drive->fields); i++) {

		const struct pinmux_drive_reg_field *field = &drive->fields[i];



		if (!field->pin && !field->offset && !field->size)

			continue;



		mask = GENMASK(field->offset + field->size, field->offset);

		if (mask & seen)

			sh_pfc_err("drive_reg 0x%x: field %u overlap\n",

				   drive->reg, i);

		seen |= mask;

		sh_pfc_check_reg(info->name, drive->reg,

				 GENMASK(field->offset + field->size - 1,

					 field->offset));



		sh_pfc_check_pin(info, drive->reg, field->pin);

	}
@@ -904,21 +913,28 @@ static void __init sh_pfc_check_bias_reg(const struct sh_pfc_soc_info *info, 
					 const struct pinmux_bias_reg *bias)

{

	unsigned int i;

	u32 bits;



	for (i = 0, bits = 0; i < ARRAY_SIZE(bias->pins); i++)

		if (bias->pins[i] != SH_PFC_PIN_NONE)

			bits |= BIT(i);



	sh_pfc_check_reg(info->name, bias->puen);

	if (bias->puen)

		sh_pfc_check_reg(info->name, bias->puen, bits);

	if (bias->pud)

		sh_pfc_check_reg(info->name, bias->pud);

		sh_pfc_check_reg(info->name, bias->pud, bits);

	for (i = 0; i < ARRAY_SIZE(bias->pins); i++)

		sh_pfc_check_pin(info, bias->puen, bias->pins[i]);

}



static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)

{

	const struct pinmux_bias_reg *bias_regs = info->bias_regs;

	const char *drvname = info->name;

	unsigned int *refcnts;

	unsigned int i, j, k;



	pr_info("Checking %s\n", drvname);

	pr_info("sh_pfc: Checking %s\n", drvname);

	sh_pfc_num_regs = 0;

	sh_pfc_num_enums = 0;
@@ -1010,16 +1026,17 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info) 
		sh_pfc_check_drive_reg(info, &info->drive_regs[i]);



	/* Check bias registers */

	for (i = 0; info->bias_regs && info->bias_regs[i].puen; i++)

		sh_pfc_check_bias_reg(info, &info->bias_regs[i]);

	for (i = 0; bias_regs && (bias_regs[i].puen || bias_regs[i].pud); i++)

		sh_pfc_check_bias_reg(info, &bias_regs[i]);



	/* Check ioctrl registers */

	for (i = 0; info->ioctrl_regs && info->ioctrl_regs[i].reg; i++)

		sh_pfc_check_reg(drvname, info->ioctrl_regs[i].reg);

		sh_pfc_check_reg(drvname, info->ioctrl_regs[i].reg, U32_MAX);



	/* Check data registers */

	for (i = 0; info->data_regs && info->data_regs[i].reg; i++) {

		sh_pfc_check_reg(drvname, info->data_regs[i].reg);

		sh_pfc_check_reg(drvname, info->data_regs[i].reg,

				 GENMASK(info->data_regs[i].reg_width - 1, 0));

		sh_pfc_check_reg_enums(drvname, info->data_regs[i].reg,

				       info->data_regs[i].enum_ids,

				       info->data_regs[i].reg_width);
@@ -1064,7 +1081,7 @@ static void __init sh_pfc_check_driver(const struct platform_driver *pdrv) 
	if (!sh_pfc_enums)

		goto free_regs;



	pr_warn("Checking builtin pinmux tables\n");

	pr_warn("sh_pfc: Checking builtin pinmux tables\n");



	for (i = 0; pdrv->id_table[i].name[0]; i++)

		sh_pfc_check_info((void *)pdrv->id_table[i].driver_data);
@@ -1074,7 +1091,7 @@ static void __init sh_pfc_check_driver(const struct platform_driver *pdrv) 
		sh_pfc_check_info(pdrv->driver.of_match_table[i].data);

#endif



	pr_warn("Detected %u errors and %u warnings\n", sh_pfc_errors,

	pr_warn("sh_pfc: Detected %u errors and %u warnings\n", sh_pfc_errors,

		sh_pfc_warnings);



	kfree(sh_pfc_enums);

drivers/pinctrl/renesas/pfc-r8a77950.c

+14 −0
Original line number Diff line number Diff line
@@ -2369,6 +2369,14 @@ static const unsigned int intc_ex_irq5_mux[] = { 
	IRQ5_MARK,

};



/* - MLB+ ------------------------------------------------------------------- */

static const unsigned int mlb_3pin_pins[] = {

	RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),

};

static const unsigned int mlb_3pin_mux[] = {

	MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,

};



/* - MSIOF0 ----------------------------------------------------------------- */

static const unsigned int msiof0_clk_pins[] = {

	/* SCK */
@@ -3987,6 +3995,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { 
	SH_PFC_PIN_GROUP(intc_ex_irq3),

	SH_PFC_PIN_GROUP(intc_ex_irq4),

	SH_PFC_PIN_GROUP(intc_ex_irq5),

	SH_PFC_PIN_GROUP(mlb_3pin),

	SH_PFC_PIN_GROUP(msiof0_clk),

	SH_PFC_PIN_GROUP(msiof0_sync),

	SH_PFC_PIN_GROUP(msiof0_ss1),
@@ -4380,6 +4389,10 @@ static const char * const intc_ex_groups[] = { 
	"intc_ex_irq5",

};



static const char * const mlb_3pin_groups[] = {

	"mlb_3pin",

};



static const char * const msiof0_groups[] = {

	"msiof0_clk",

	"msiof0_sync",
@@ -4709,6 +4722,7 @@ static const struct sh_pfc_function pinmux_functions[] = { 
	SH_PFC_FUNCTION(i2c5),

	SH_PFC_FUNCTION(i2c6),

	SH_PFC_FUNCTION(intc_ex),

	SH_PFC_FUNCTION(mlb_3pin),

	SH_PFC_FUNCTION(msiof0),

	SH_PFC_FUNCTION(msiof1),

	SH_PFC_FUNCTION(msiof2),

drivers/pinctrl/renesas/pfc-r8a77951.c

+20 −2
Original line number Diff line number Diff line
@@ -2453,6 +2453,16 @@ static const unsigned int intc_ex_irq5_mux[] = { 
	IRQ5_MARK,

};



#ifdef CONFIG_PINCTRL_PFC_R8A77951

/* - MLB+ ------------------------------------------------------------------- */

static const unsigned int mlb_3pin_pins[] = {

	RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),

};

static const unsigned int mlb_3pin_mux[] = {

	MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,

};

#endif /* CONFIG_PINCTRL_PFC_R8A77951 */



/* - MSIOF0 ----------------------------------------------------------------- */

static const unsigned int msiof0_clk_pins[] = {

	/* SCK */
@@ -4235,7 +4245,7 @@ static const unsigned int vin5_clk_mux[] = { 
static const struct {

	struct sh_pfc_pin_group common[328];

#ifdef CONFIG_PINCTRL_PFC_R8A77951

	struct sh_pfc_pin_group automotive[30];

	struct sh_pfc_pin_group automotive[31];

#endif

} pinmux_groups = {

	.common = {
@@ -4600,6 +4610,7 @@ static const struct { 
		SH_PFC_PIN_GROUP(drif3_ctrl_b),

		SH_PFC_PIN_GROUP(drif3_data0_b),

		SH_PFC_PIN_GROUP(drif3_data1_b),

		SH_PFC_PIN_GROUP(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77951 */

};
@@ -4795,6 +4806,12 @@ static const char * const intc_ex_groups[] = { 
	"intc_ex_irq5",

};



#ifdef CONFIG_PINCTRL_PFC_R8A77951

static const char * const mlb_3pin_groups[] = {

	"mlb_3pin",

};

#endif /* CONFIG_PINCTRL_PFC_R8A77951 */



static const char * const msiof0_groups[] = {

	"msiof0_clk",

	"msiof0_sync",
@@ -5144,7 +5161,7 @@ static const char * const vin5_groups[] = { 
static const struct {

	struct sh_pfc_function common[55];

#ifdef CONFIG_PINCTRL_PFC_R8A77951

	struct sh_pfc_function automotive[4];

	struct sh_pfc_function automotive[5];

#endif

} pinmux_functions = {

	.common = {
@@ -5210,6 +5227,7 @@ static const struct { 
		SH_PFC_FUNCTION(drif1),

		SH_PFC_FUNCTION(drif2),

		SH_PFC_FUNCTION(drif3),

		SH_PFC_FUNCTION(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77951 */

};

drivers/pinctrl/renesas/pfc-r8a7796.c

+20 −2
Original line number Diff line number Diff line
@@ -2458,6 +2458,16 @@ static const unsigned int intc_ex_irq5_mux[] = { 
	IRQ5_MARK,

};



#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

/* - MLB+ ------------------------------------------------------------------- */

static const unsigned int mlb_3pin_pins[] = {

	RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),

};

static const unsigned int mlb_3pin_mux[] = {

	MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,

};

#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */



/* - MSIOF0 ----------------------------------------------------------------- */

static const unsigned int msiof0_clk_pins[] = {

	/* SCK */
@@ -4210,7 +4220,7 @@ static const unsigned int vin5_clk_mux[] = { 
static const struct {

	struct sh_pfc_pin_group common[324];

#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

	struct sh_pfc_pin_group automotive[30];

	struct sh_pfc_pin_group automotive[31];

#endif

} pinmux_groups = {

	.common = {
@@ -4571,6 +4581,7 @@ static const struct { 
		SH_PFC_PIN_GROUP(drif3_ctrl_b),

		SH_PFC_PIN_GROUP(drif3_data0_b),

		SH_PFC_PIN_GROUP(drif3_data1_b),

		SH_PFC_PIN_GROUP(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */

};
@@ -4766,6 +4777,12 @@ static const char * const intc_ex_groups[] = { 
	"intc_ex_irq5",

};



#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

static const char * const mlb_3pin_groups[] = {

	"mlb_3pin",

};

#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */



static const char * const msiof0_groups[] = {

	"msiof0_clk",

	"msiof0_sync",
@@ -5102,7 +5119,7 @@ static const char * const vin5_groups[] = { 
static const struct {

	struct sh_pfc_function common[52];

#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

	struct sh_pfc_function automotive[4];

	struct sh_pfc_function automotive[5];

#endif

} pinmux_functions = {

	.common = {
@@ -5165,6 +5182,7 @@ static const struct { 
		SH_PFC_FUNCTION(drif1),

		SH_PFC_FUNCTION(drif2),

		SH_PFC_FUNCTION(drif3),

		SH_PFC_FUNCTION(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */

};

drivers/pinctrl/renesas/pfc-r8a77965.c

+20 −2
Original line number Diff line number Diff line
@@ -2609,6 +2609,16 @@ static const unsigned int intc_ex_irq5_mux[] = { 
	IRQ5_MARK,

};



#ifdef CONFIG_PINCTRL_PFC_R8A77965

/* - MLB+ ------------------------------------------------------------------- */

static const unsigned int mlb_3pin_pins[] = {

	RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),

};

static const unsigned int mlb_3pin_mux[] = {

	MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,

};

#endif /* CONFIG_PINCTRL_PFC_R8A77965 */



/* - MSIOF0 ----------------------------------------------------------------- */

static const unsigned int msiof0_clk_pins[] = {

	/* SCK */
@@ -4460,7 +4470,7 @@ static const unsigned int vin5_clk_mux[] = { 
static const struct {

	struct sh_pfc_pin_group common[326];

#ifdef CONFIG_PINCTRL_PFC_R8A77965

	struct sh_pfc_pin_group automotive[30];

	struct sh_pfc_pin_group automotive[31];

#endif

} pinmux_groups = {

	.common = {
@@ -4823,6 +4833,7 @@ static const struct { 
		SH_PFC_PIN_GROUP(drif3_ctrl_b),

		SH_PFC_PIN_GROUP(drif3_data0_b),

		SH_PFC_PIN_GROUP(drif3_data1_b),

		SH_PFC_PIN_GROUP(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77965 */

};
@@ -5018,6 +5029,12 @@ static const char * const intc_ex_groups[] = { 
	"intc_ex_irq5",

};



#ifdef CONFIG_PINCTRL_PFC_R8A77965

static const char * const mlb_3pin_groups[] = {

	"mlb_3pin",

};

#endif /* CONFIG_PINCTRL_PFC_R8A77965 */



static const char * const msiof0_groups[] = {

	"msiof0_clk",

	"msiof0_sync",
@@ -5358,7 +5375,7 @@ static const char * const vin5_groups[] = { 
static const struct {

	struct sh_pfc_function common[53];

#ifdef CONFIG_PINCTRL_PFC_R8A77965

	struct sh_pfc_function automotive[4];

	struct sh_pfc_function automotive[5];

#endif

} pinmux_functions = {

	.common = {
@@ -5422,6 +5439,7 @@ static const struct { 
		SH_PFC_FUNCTION(drif1),

		SH_PFC_FUNCTION(drif2),

		SH_PFC_FUNCTION(drif3),

		SH_PFC_FUNCTION(mlb_3pin),

	}

#endif /* CONFIG_PINCTRL_PFC_R8A77965 */

};