Commit 56f67371 authored by Mars Cheng's avatar Mars Cheng Committed by Matthias Brugger
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dt-bindings: mediatek: add MT6765 power dt-bindings 



This adds power dt-bindings for MT6765

Signed-off-by: default avatarMars Cheng <mars.cheng@mediatek.com>
Signed-off-by: default avatarOwen Chen <owen.chen@mediatek.com>
Signed-off-by: default avatarMacpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 949601a7

Documentation/devicetree/bindings/soc/mediatek/scpsys.txt

+6 −0
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@@ -11,6 +11,7 @@ The driver implements the Generic PM domain bindings described in 
power/power-domain.yaml. It provides the power domains defined in

- include/dt-bindings/power/mt8173-power.h

- include/dt-bindings/power/mt6797-power.h

- include/dt-bindings/power/mt6765-power.h

- include/dt-bindings/power/mt2701-power.h

- include/dt-bindings/power/mt2712-power.h

- include/dt-bindings/power/mt7622-power.h
@@ -19,6 +20,7 @@ Required properties: 
- compatible: Should be one of:

	- "mediatek,mt2701-scpsys"

	- "mediatek,mt2712-scpsys"

	- "mediatek,mt6765-scpsys"

	- "mediatek,mt6797-scpsys"

	- "mediatek,mt7622-scpsys"

	- "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
@@ -33,6 +35,10 @@ Required properties: 
                      enabled before enabling certain power domains.

	Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"

	Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"

	Required clocks for MT6765: MUX: "mm", "mfg"

				    CG: "mm-0", "mm-1", "mm-2", "mm-3", "isp-0",

					"isp-1", "cam-0", "cam-1", "cam-2",

					"cam-3","cam-4"

	Required clocks for MT6797: "mm", "mfg", "vdec"

	Required clocks for MT7622 or MT7629: "hif_sel"

	Required clocks for MT7623A: "ethif"

include/dt-bindings/power/mt6765-power.h

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/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _DT_BINDINGS_POWER_MT6765_POWER_H

#define _DT_BINDINGS_POWER_MT6765_POWER_H



#define MT6765_POWER_DOMAIN_CONN		0

#define MT6765_POWER_DOMAIN_MM			1

#define MT6765_POWER_DOMAIN_MFG_ASYNC		2

#define MT6765_POWER_DOMAIN_ISP			3

#define MT6765_POWER_DOMAIN_MFG			4

#define MT6765_POWER_DOMAIN_MFG_CORE0		5

#define MT6765_POWER_DOMAIN_CAM			6

#define MT6765_POWER_DOMAIN_VCODEC		7



#endif /* _DT_BINDINGS_POWER_MT6765_POWER_H */