Commit 56b5b1c7 authored by Oliver Logush's avatar Oliver Logush Committed by Alex Deucher
Browse files

drm/amd/display: Always update DPPCLK_DTO when clock increase 



[why]
Need to update the update_clock sequence to a fully tested sequence for
dcn30

[how]
Removed the check to see if clock is lowered

Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: default avatarOliver Logush <oliver.logush@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c1b972a1

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c

+1 −2
Original line number Diff line number Diff line
@@ -157,7 +157,6 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base, 
		} else {

			if (update_dppclk || update_dispclk)

				dcn20_update_clocks_update_dentist(clk_mgr, context);

			if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);

		}

	}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

+1 −2
Original line number Diff line number Diff line
@@ -176,7 +176,6 @@ static void vg_update_clocks(struct clk_mgr *clk_mgr_base, 
		if (update_dppclk || update_dispclk)

			dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);

		// always update dtos unless clock is lowered and not safe to lower

		if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

		dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);

	}

}