Commit 561538f7 authored by Balsam CHIHI's avatar Balsam CHIHI Committed by Daniel Lezcano
Browse files

thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195 



Add MT8195 AP Domain support to LVTS Driver.

Take the opportunity to update the comments to show calibration data
information related to the new domain.

[dlezcano]: Massaged a bit the changelog

Signed-off-by: default avatarBalsam CHIHI <bchihi@baylibre.com>
Tested-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230307154524.118541-3-bchihi@baylibre.com
parent 05aaa7fd

drivers/thermal/mediatek/lvts_thermal.c

+74 −20
Original line number Diff line number Diff line
@@ -530,29 +530,33 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl, 
 * The efuse blob values follows the sensor enumeration per thermal

 * controller. The decoding of the stream is as follow:

 *

 *                        <--?-> <----big0 ???---> <-sensor0-> <-0->

 *                        ------------------------------------------

 * index in the stream: : | 0x0 | 0x1 | 0x2 | 0x3 | 0x4 | 0x5 | 0x6 |

 *                        ------------------------------------------

 * stream index map for MCU Domain :

 *

 *                        <--sensor1--><-0-> <----big1 ???---> <-sen

 *                        ------------------------------------------

 *                        | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |

 *                        ------------------------------------------

 * <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1----->

 *  0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09

 *

 *                        sor0-> <-0-> <-sensor1-> <-0-> ..........

 *                        ------------------------------------------

 *                        | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |

 *                        ------------------------------------------

 * <-----mcu-tc#1-----> <-----sensor#2-----> <-----sensor#3----->

 *  0x0A | 0x0B | 0x0C | 0x0D | 0x0E | 0x0F | 0x10 | 0x11 | 0x12

 *

 * And so on ...

 * <-----mcu-tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7----->

 *  0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21

 *

 * stream index map for AP Domain :

 *

 * <-----ap--tc#0-----> <-----sensor#0-----> <-----sensor#1----->

 *  0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A

 *

 * <-----ap--tc#1-----> <-----sensor#2-----> <-----sensor#3----->

 *  0x2B | 0x2C | 0x2D | 0x2E | 0x2F | 0x30 | 0x31 | 0x32 | 0x33

 *

 * <-----ap--tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6----->

 *  0x34 | 0x35 | 0x36 | 0x37 | 0x38 | 0x39 | 0x3A | 0x3B | 0x3C | 0x3D | 0x3E | 0x3F

 *

 * <-----ap--tc#3-----> <-----sensor#7-----> <-----sensor#8----->

 *  0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48

 *

 * The data description gives the offset of the calibration data in

 * this bytes stream for each sensor.

 *

 * Each thermal controller can handle up to 4 sensors max, we don't

 * care if there are less as the array of calibration is sized to 4

 * anyway. The unused sensor slot will be zeroed.

 */

static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,

					const struct lvts_ctrl_data *lvts_ctrl_data,
@@ -1165,7 +1169,7 @@ static int lvts_remove(struct platform_device *pdev) 
	return 0;

}



static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = {

static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {

	{

		.cal_offset = { 0x04, 0x07 },

		.lvts_sensor = {
@@ -1200,13 +1204,63 @@ static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = { 
	}

};



static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {

		{

		.cal_offset = { 0x25, 0x28 },

		.lvts_sensor = {

			{ .dt_id = MT8195_AP_VPU0 },

			{ .dt_id = MT8195_AP_VPU1 }

		},

		.num_lvts_sensor = 2,

		.offset = 0x0,

		.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,

	},

	{

		.cal_offset = { 0x2e, 0x31 },

		.lvts_sensor = {

			{ .dt_id = MT8195_AP_GPU0 },

			{ .dt_id = MT8195_AP_GPU1 }

		},

		.num_lvts_sensor = 2,

		.offset = 0x100,

		.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,

	},

	{

		.cal_offset = { 0x37, 0x3a, 0x3d },

		.lvts_sensor = {

			{ .dt_id = MT8195_AP_VDEC },

			{ .dt_id = MT8195_AP_IMG },

			{ .dt_id = MT8195_AP_INFRA },

		},

		.num_lvts_sensor = 3,

		.offset = 0x200,

		.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,

	},

	{

		.cal_offset = { 0x43, 0x46 },

		.lvts_sensor = {

			{ .dt_id = MT8195_AP_CAM0 },

			{ .dt_id = MT8195_AP_CAM1 }

		},

		.num_lvts_sensor = 2,

		.offset = 0x300,

		.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,

	}

};



static const struct lvts_data mt8195_lvts_mcu_data = {

	.lvts_ctrl	= mt8195_lvts_data_ctrl,

	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_data_ctrl),

	.lvts_ctrl	= mt8195_lvts_mcu_data_ctrl,

	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),

};



static const struct lvts_data mt8195_lvts_ap_data = {

	.lvts_ctrl	= mt8195_lvts_ap_data_ctrl,

	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),

};



static const struct of_device_id lvts_of_match[] = {

	{ .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },

	{ .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data },

	{},

};

MODULE_DEVICE_TABLE(of, lvts_of_match);