Commit 5561a2b0 authored by William Breathitt Gray's avatar William Breathitt Gray Committed by Bartosz Golaszewski
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gpio: ws16c48: Utilize iomap interface 



This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: default avatarDavid Laight <David.Laight@ACULAB.COM>
Signed-off-by: default avatarWilliam Breathitt Gray <william.gray@linaro.org>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent 54c8e251

drivers/gpio/gpio-ws16c48.c

+34 −31
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ struct ws16c48_gpio { 
	raw_spinlock_t lock;

	unsigned long irq_mask;

	unsigned long flow_mask;

	unsigned base;

	void __iomem *base;

};



static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
@@ -73,7 +73,7 @@ static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 


	ws16c48gpio->io_state[port] |= mask;

	ws16c48gpio->out_state[port] &= ~mask;

	outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);

	iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->base + port);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
@@ -95,7 +95,7 @@ static int ws16c48_gpio_direction_output(struct gpio_chip *chip, 
		ws16c48gpio->out_state[port] |= mask;

	else

		ws16c48gpio->out_state[port] &= ~mask;

	outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);

	iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->base + port);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
@@ -118,7 +118,7 @@ static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset) 
		return -EINVAL;

	}



	port_state = inb(ws16c48gpio->base + port);

	port_state = ioread8(ws16c48gpio->base + port);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
@@ -131,7 +131,7 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, 
	struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);

	unsigned long offset;

	unsigned long gpio_mask;

	unsigned int port_addr;

	void __iomem *port_addr;

	unsigned long port_state;



	/* clear bits array to a clean slate */
@@ -139,7 +139,7 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, 


	for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {

		port_addr = ws16c48gpio->base + offset / 8;

		port_state = inb(port_addr) & gpio_mask;

		port_state = ioread8(port_addr) & gpio_mask;



		bitmap_set_value8(bits, port_state, offset);

	}
@@ -166,7 +166,7 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 
		ws16c48gpio->out_state[port] |= mask;

	else

		ws16c48gpio->out_state[port] &= ~mask;

	outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);

	iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->base + port);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);

}
@@ -178,7 +178,7 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, 
	unsigned long offset;

	unsigned long gpio_mask;

	size_t index;

	unsigned int port_addr;

	void __iomem *port_addr;

	unsigned long bitmask;

	unsigned long flags;
@@ -195,7 +195,7 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, 
		/* update output state data and set device gpio register */

		ws16c48gpio->out_state[index] &= ~gpio_mask;

		ws16c48gpio->out_state[index] |= bitmask;

		outb(ws16c48gpio->out_state[index], port_addr);

		iowrite8(ws16c48gpio->out_state[index], port_addr);



		raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);

	}
@@ -219,10 +219,10 @@ static void ws16c48_irq_ack(struct irq_data *data) 


	port_state = ws16c48gpio->irq_mask >> (8*port);



	outb(0x80, ws16c48gpio->base + 7);

	outb(port_state & ~mask, ws16c48gpio->base + 8 + port);

	outb(port_state | mask, ws16c48gpio->base + 8 + port);

	outb(0xC0, ws16c48gpio->base + 7);

	iowrite8(0x80, ws16c48gpio->base + 7);

	iowrite8(port_state & ~mask, ws16c48gpio->base + 8 + port);

	iowrite8(port_state | mask, ws16c48gpio->base + 8 + port);

	iowrite8(0xC0, ws16c48gpio->base + 7);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);

}
@@ -244,9 +244,9 @@ static void ws16c48_irq_mask(struct irq_data *data) 


	ws16c48gpio->irq_mask &= ~mask;



	outb(0x80, ws16c48gpio->base + 7);

	outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);

	outb(0xC0, ws16c48gpio->base + 7);

	iowrite8(0x80, ws16c48gpio->base + 7);

	iowrite8(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);

	iowrite8(0xC0, ws16c48gpio->base + 7);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);

}
@@ -268,9 +268,9 @@ static void ws16c48_irq_unmask(struct irq_data *data) 


	ws16c48gpio->irq_mask |= mask;



	outb(0x80, ws16c48gpio->base + 7);

	outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);

	outb(0xC0, ws16c48gpio->base + 7);

	iowrite8(0x80, ws16c48gpio->base + 7);

	iowrite8(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);

	iowrite8(0xC0, ws16c48gpio->base + 7);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);

}
@@ -304,9 +304,9 @@ static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type) 
		return -EINVAL;

	}



	outb(0x40, ws16c48gpio->base + 7);

	outb(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port);

	outb(0xC0, ws16c48gpio->base + 7);

	iowrite8(0x40, ws16c48gpio->base + 7);

	iowrite8(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port);

	iowrite8(0xC0, ws16c48gpio->base + 7);



	raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
@@ -330,20 +330,20 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id) 
	unsigned long int_id;

	unsigned long gpio;



	int_pending = inb(ws16c48gpio->base + 6) & 0x7;

	int_pending = ioread8(ws16c48gpio->base + 6) & 0x7;

	if (!int_pending)

		return IRQ_NONE;



	/* loop until all pending interrupts are handled */

	do {

		for_each_set_bit(port, &int_pending, 3) {

			int_id = inb(ws16c48gpio->base + 8 + port);

			int_id = ioread8(ws16c48gpio->base + 8 + port);

			for_each_set_bit(gpio, &int_id, 8)

				generic_handle_domain_irq(chip->irq.domain,

							  gpio + 8*port);

		}



		int_pending = inb(ws16c48gpio->base + 6) & 0x7;

		int_pending = ioread8(ws16c48gpio->base + 6) & 0x7;

	} while (int_pending);



	return IRQ_HANDLED;
@@ -370,11 +370,11 @@ static int ws16c48_irq_init_hw(struct gpio_chip *gc) 
	struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(gc);



	/* Disable IRQ by default */

	outb(0x80, ws16c48gpio->base + 7);

	outb(0, ws16c48gpio->base + 8);

	outb(0, ws16c48gpio->base + 9);

	outb(0, ws16c48gpio->base + 10);

	outb(0xC0, ws16c48gpio->base + 7);

	iowrite8(0x80, ws16c48gpio->base + 7);

	iowrite8(0, ws16c48gpio->base + 8);

	iowrite8(0, ws16c48gpio->base + 9);

	iowrite8(0, ws16c48gpio->base + 10);

	iowrite8(0xC0, ws16c48gpio->base + 7);



	return 0;

}
@@ -396,6 +396,10 @@ static int ws16c48_probe(struct device *dev, unsigned int id) 
		return -EBUSY;

	}



	ws16c48gpio->base = devm_ioport_map(dev, base[id], WS16C48_EXTENT);

	if (!ws16c48gpio->base)

		return -ENOMEM;



	ws16c48gpio->chip.label = name;

	ws16c48gpio->chip.parent = dev;

	ws16c48gpio->chip.owner = THIS_MODULE;
@@ -409,7 +413,6 @@ static int ws16c48_probe(struct device *dev, unsigned int id) 
	ws16c48gpio->chip.get_multiple = ws16c48_gpio_get_multiple;

	ws16c48gpio->chip.set = ws16c48_gpio_set;

	ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple;

	ws16c48gpio->base = base[id];



	girq = &ws16c48gpio->chip.irq;

	girq->chip = &ws16c48_irqchip;