Commit 55453c09 authored by Hsin-Yi Wang's avatar Hsin-Yi Wang Committed by Douglas Anderson
Browse files

drm/bridge: ps8640: Add double reset T4 and T5 to power-on sequence 



The double reset power-on sequence is a workaround for the hardware
flaw in some chip that SPI Clock output glitch and cause internal MPU
unable to read firmware correctly. The sequence is suggested in ps8640
application note.

Signed-off-by: default avatarHsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: default avatarRock Chiu <rock.chiu@paradetech.corp-partner.google.com>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220815093905.134164-1-hsinyi@chromium.org
parent da09daf8

drivers/gpu/drm/bridge/parade-ps8640.c

+5 −0
Original line number Diff line number Diff line
@@ -375,6 +375,11 @@ static int __maybe_unused ps8640_resume(struct device *dev) 
	gpiod_set_value(ps_bridge->gpio_reset, 1);

	usleep_range(2000, 2500);

	gpiod_set_value(ps_bridge->gpio_reset, 0);

	/* Double reset for T4 and T5 */

	msleep(50);

	gpiod_set_value(ps_bridge->gpio_reset, 1);

	msleep(50);

	gpiod_set_value(ps_bridge->gpio_reset, 0);



	/*

	 * Mystery 200 ms delay for the "MCU to be ready". It's unclear if