Commit 54fc65a8 authored by Dan Carpenter's avatar Dan Carpenter Committed by Wenkuan Wang
Browse files

cxl/hdm: Fix && vs || bug 

mainline inclusion
from mainline-v6.7-rc1
commit 69d56b15a7941680aba8c3175b165221ecdf54b6
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8ZZ5K


CVE: NA

--------------------------------

If "info" is NULL then this code will crash.  || was intended instead of
&&.

Fixes: 8ce520fdea24 ("cxl/hdm: Use stored Component Register mappings to map HDM decoder capability")
Signed-off-by: default avatarDan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: default avatarRobert Richter <rrichter@amd.com>
Link: https://lore.kernel.org/r/60028378-d3d5-4d6d-90fd-f915f061e731@moroto.mountain


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarWenkuan Wang <Wenkuan.Wang@amd.com>
parent 7da12864

drivers/cxl/core/hdm.c

+1 −1
Original line number Diff line number Diff line
@@ -146,7 +146,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, 


	/* Memory devices can configure device HDM using DVSEC range regs. */

	if (reg_map->resource == CXL_RESOURCE_NONE) {

		if (!info && !info->mem_enabled) {

		if (!info || !info->mem_enabled) {

			dev_err(dev, "No component registers mapped\n");

			return ERR_PTR(-ENXIO);

		}