Commit 54e1217b authored by Aya Levin's avatar Aya Levin Committed by Saeed Mahameed
Browse files

net/mlx5e: Block offload of outer header csum for GRE tunnel 



The device is able to offload either the outer header csum or inner
header csum. The driver utilizes the inner csum offload. So, prohibit
setting of tx-gre-csum-segmentation and let it be: off[fixed].

Fixes: 27299841 ("net/mlx5e: Support TSO and TX checksum offloads for GRE tunnels")
Signed-off-by: default avatarAya Levin <ayal@nvidia.com>
Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 6d6727dd

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+3 −6
Original line number Diff line number Diff line
@@ -4828,12 +4828,9 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev) 
	}



	if (mlx5e_tunnel_proto_supported_tx(mdev, IPPROTO_GRE)) {

		netdev->hw_features     |= NETIF_F_GSO_GRE |

					   NETIF_F_GSO_GRE_CSUM;

		netdev->hw_enc_features |= NETIF_F_GSO_GRE |

					   NETIF_F_GSO_GRE_CSUM;

		netdev->gso_partial_features |= NETIF_F_GSO_GRE |

						NETIF_F_GSO_GRE_CSUM;

		netdev->hw_features     |= NETIF_F_GSO_GRE;

		netdev->hw_enc_features |= NETIF_F_GSO_GRE;

		netdev->gso_partial_features |= NETIF_F_GSO_GRE;

	}



	if (mlx5e_tunnel_proto_supported_tx(mdev, IPPROTO_IPIP)) {