Commit 54bf54c8 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-for-5.11' of... 

Merge tag 'phy-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.11

 - New phy drivers:
   - Mediatek MT7621 PCIe PHY (promoted from staging)
   - Ingenic USB phy driver supporting JZ4775 and X2000
   - Intel Keem Bay USB PHY driver
   - Marvell USB HSIC PHY driver supporting MMP3 SoC
   - AXG MIPI D-PHY driver

 - Updates:
   - Conversion to YAML binding for:
	- Broadcom SATA PHY
	- Cadence Sierra PHY bindings
	- STM32 USBC Phy
   - Support for Exynos5433 PCIe PHY
   - Support for Qualcomm SM8250 PCIe QMP PHY
   - Support for Exynos5420 USB2 phy
   - devm_platform_ioremap_resource conversion for bunch of drivers

* tag 'phy-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
  drm/mediatek: avoid dereferencing a null hdmi_phy on an error message
  phy: ingenic: depend on HAS_IOMEM
  phy: mediatek: statify mtk_hdmi_phy_driver
  dt-bindings: phy: Convert Broadcom SATA PHY to YAML
  devicetree: phy: rockchip-emmc add output-tapdelay-select
  phy: rockchip-emmc: output tap delay dt property
  PHY: Ingenic: Add USB PHY driver using generic PHY framework.
  dt-bindings: USB: Add bindings for Ingenic JZ4775 and X2000.
  USB: PHY: JZ4770: Remove unnecessary function calls.
  devicetree: phy: rockchip-emmc: pulldown property
  phy: rockchip: set pulldown for strobe line in dts
  phy: renesas: rcar-gen3-usb2: disable runtime pm in case of failure
  phy: mediatek: allow compile-testing the hdmi phy
  phy/rockchip: Make PHY_ROCKCHIP_INNO_HDMI depend on HAS_IOMEM to fix build error
  phy: samsung: Merge Kconfig for Exynos5420 and Exynos5250
  phy: ralink: phy-mt7621-pci: set correct name in MODULE_DEVICE_TABLE macro
  phy: ralink: phy-mt7621-pci: drop 'COMPILE_TEST' from Kconfig
  phy: mediatek: Make PHY_MTK_{XSPHY, TPHY} depend on HAS_IOMEM and OF_ADDRESS to fix build errors
  phy: tegra: xusb: Fix usb_phy device driver field
  phy: amlogic: replace devm_reset_control_array_get()
  ...
parents e7255092 b097efba

Documentation/devicetree/bindings/clock/ingenic,cgu.yaml

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@@ -92,7 +92,7 @@ required: 


patternProperties:

  "^usb-phy@[a-f0-9]+$":

    allOf: [ $ref: "../usb/ingenic,jz4770-phy.yaml#" ]

    allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ]



additionalProperties: false

Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2020 BayLibre, SAS

%YAML 1.2

---

$id: "http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Amlogic AXG MIPI D-PHY



maintainers:

  - Neil Armstrong <narmstrong@baylibre.com>



properties:

  compatible:

    enum:

      - amlogic,axg-mipi-dphy



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  clock-names:

    items:

      - const: pclk



  resets:

    maxItems: 1



  reset-names:

    items:

      - const: phy



  "#phy-cells":

    const: 0



  phys:

    maxItems: 1



  phy-names:

    items:

      - const: analog



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - resets

  - reset-names

  - phys

  - phy-names

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    phy@ff640000 {

            compatible = "amlogic,axg-mipi-dphy";

            reg = <0xff640000 0x100>;

            clocks = <&clk_mipi_dsi_phy>;

            clock-names = "pclk";

            resets = <&reset_phy>;

            reset-names = "phy";

            phys = <&mipi_pcie_analog_dphy>;

            phy-names = "analog";

            #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml

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@@ -9,27 +9,32 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY 
maintainers:

  - Remi Pommarel <repk@triplefau.lt>



description: |+

  The Everything-Else Power Domains node should be the child of a syscon

  node with the required property:



  - compatible: Should be the following:

                "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"



  Refer to the the bindings described in

  Documentation/devicetree/bindings/mfd/syscon.yaml



properties:

  compatible:

    const: amlogic,axg-mipi-pcie-analog-phy



  reg:

    maxItems: 1



  "#phy-cells":

    const: 1

    const: 0



required:

  - compatible

  - reg

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    mpphy: phy@0 {

    mpphy: phy {

          compatible = "amlogic,axg-mipi-pcie-analog-phy";

          reg = <0x0 0xc>;

          #phy-cells = <1>;

          #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Broadcom SATA3 PHY



maintainers:

  - Florian Fainelli <f.fainelli@gmail.com>



properties:

  $nodename:

    pattern: "^sata[-|_]phy(@.*)?$"



  compatible:

    oneOf:

      - items:

          - enum:

              - brcm,bcm7216-sata-phy

              - brcm,bcm7425-sata-phy

              - brcm,bcm7445-sata-phy

              - brcm,bcm63138-sata-phy

          - const: brcm,phy-sata3

      - items:

          - const: brcm,iproc-nsp-sata-phy

      - items:

          - const: brcm,iproc-ns2-sata-phy

      - items:

          - const: brcm,iproc-sr-sata-phy



  reg:

    minItems: 1

    maxItems: 2



  reg-names:

    minItems: 1

    maxItems: 2

    items:

      - const: phy

      - const: phy-ctrl



  "#address-cells":

    const: 1



  "#size-cells":

    const: 0



patternProperties:

  "^sata-phy@[0-9]+$":

    type: object

    description: |

      Each port's PHY should be represented as a sub-node.



    properties:

      reg:

        description: The SATA PHY port number

        maxItems: 1



      "#phy-cells":

        const: 0



      "brcm,enable-ssc":

        $ref: /schemas/types.yaml#/definitions/flag

        description: |

          Use spread spectrum clocking (SSC) on this port

          This property is not applicable for "brcm,iproc-ns2-sata-phy",

          "brcm,iproc-nsp-sata-phy" and "brcm,iproc-sr-sata-phy".



      "brcm,rxaeq-mode":

        $ref: /schemas/types.yaml#/definitions/string

        description:

          String that indicates the desired RX equalizer mode.

        enum:

          - off

          - auto

          - manual



      "brcm,rxaeq-value":

        $ref: /schemas/types.yaml#/definitions/uint32

        description: |

            When 'brcm,rxaeq-mode' is set to "manual", provides the RX

            equalizer value that should be used.

        minimum: 0

        maximum: 63



      "brcm,tx-amplitude-millivolt":

        description: |

            Transmit amplitude voltage in millivolt.

        $ref: /schemas/types.yaml#/definitions/uint32

        enum: [400, 500, 600, 800]



    required:

      - reg

      - "#phy-cells"



    additionalProperties: false



if:

  properties:

    compatible:

      items:

        const: brcm,iproc-ns2-sata-phy

then:

  properties:

    reg:

      maxItems: 2

    reg-names:

      items:

        - const: "phy"

        - const: "phy-ctrl"

else:

  properties:

    reg:

      maxItems: 1

    reg-names:

      maxItems: 1

      items:

        - const: "phy"



required:

  - compatible

  - "#address-cells"

  - "#size-cells"

  - reg

  - reg-names



additionalProperties: false



examples:

  - |

    sata_phy@f0458100 {

        compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";

        reg = <0xf0458100 0x1e00>;

        reg-names = "phy";

        #address-cells = <1>;

        #size-cells = <0>;



        sata-phy@0 {

                reg = <0>;

                #phy-cells = <0>;

        };



        sata-phy@1 {

                reg = <1>;

                #phy-cells = <0>;

        };

    };

Documentation/devicetree/bindings/phy/brcm-sata-phy.txt

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* Broadcom SATA3 PHY



Required properties:

- compatible: should be one or more of

     "brcm,bcm7216-sata-phy"

     "brcm,bcm7425-sata-phy"

     "brcm,bcm7445-sata-phy"

     "brcm,iproc-ns2-sata-phy"

     "brcm,iproc-nsp-sata-phy"

     "brcm,phy-sata3"

     "brcm,iproc-sr-sata-phy"

     "brcm,bcm63138-sata-phy"

- address-cells: should be 1

- size-cells: should be 0

- reg: register ranges for the PHY PCB interface

- reg-names: should be "phy" and "phy-ctrl"

     The "phy-ctrl" registers are only required for

     "brcm,iproc-ns2-sata-phy" and "brcm,iproc-sr-sata-phy".



Sub-nodes:

  Each port's PHY should be represented as a sub-node.



Sub-nodes required properties:

- reg: the PHY number

- phy-cells: generic PHY binding; must be 0



Sub-nodes optional properties:

- brcm,enable-ssc: use spread spectrum clocking (SSC) on this port

     This property is not applicable for "brcm,iproc-ns2-sata-phy",

     "brcm,iproc-nsp-sata-phy" and "brcm,iproc-sr-sata-phy".



- brcm,rxaeq-mode: string that indicates the desired RX equalizer

  mode, possible values are:

	"off" (equivalent to not specifying the property)

	"auto"

	"manual" (brcm,rxaeq-value is used in that case)



- brcm,rxaeq-value: when 'rxaeq-mode' is set to "manual", provides the RX

  equalizer value that should be used. Allowed range is 0..63.



Example

	sata-phy@f0458100 {

		compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";

		reg = <0xf0458100 0x1e00>, <0xf045804c 0x10>;

		reg-names = "phy";

		#address-cells = <1>;

		#size-cells = <0>;



		sata-phy@0 {

			reg = <0>;

			#phy-cells = <0>;

		};



		sata-phy@1 {

			reg = <1>;

			#phy-cells = <0>;

		};

	};