Commit 5497b23e authored by Shunsuke Nakamura's avatar Shunsuke Nakamura Committed by Arnaldo Carvalho de Melo
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perf vendor events arm64: Add Fujitsu A64FX pmu event

Add pmu events for A64FX.

Documentation source:

  https://github.com/fujitsu/A64FX/blob/master/doc/A64FX_PMU_Events_v1.2.pdf



Signed-off-by: default avatarNakamura, Shunsuke/中村 俊介 <nakamura.shun@fujitsu.com>
Reviewed-by: default avatarJohn Garry <john.garry@huawei.com>
Tested-by: default avatarMasayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lore.kernel.org/lkml/20210308105342.746940-3-nakamura.shun@fujitsu.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 8efd1634
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+8 −0
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[
  {
    "ArchStdEvent": "BR_MIS_PRED"
  },
  {
    "ArchStdEvent": "BR_PRED"
  }
]
+62 −0
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[
  {
    "PublicDescription": "This event counts read transactions from tofu controller to measured CMG.",
    "EventCode": "0x314",
    "EventName": "BUS_READ_TOTAL_TOFU",
    "BriefDescription": "This event counts read transactions from tofu controller to measured CMG."
  },
  {
    "PublicDescription": "This event counts read transactions from PCI controller to measured CMG.",
    "EventCode": "0x315",
    "EventName": "BUS_READ_TOTAL_PCI",
    "BriefDescription": "This event counts read transactions from PCI controller to measured CMG."
  },
  {
    "PublicDescription": "This event counts read transactions from measured CMG local memory to measured CMG.",
    "EventCode": "0x316",
    "EventName": "BUS_READ_TOTAL_MEM",
    "BriefDescription": "This event counts read transactions from measured CMG local memory to measured CMG."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to CMG0, if measured CMG is not CMG0.",
    "EventCode": "0x318",
    "EventName": "BUS_WRITE_TOTAL_CMG0",
    "BriefDescription": "This event counts write transactions from measured CMG to CMG0, if measured CMG is not CMG0."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to CMG1, if measured CMG is not CMG1.",
    "EventCode": "0x319",
    "EventName": "BUS_WRITE_TOTAL_CMG1",
    "BriefDescription": "This event counts write transactions from measured CMG to CMG1, if measured CMG is not CMG1."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to CMG2, if measured CMG is not CMG2.",
    "EventCode": "0x31A",
    "EventName": "BUS_WRITE_TOTAL_CMG2",
    "BriefDescription": "This event counts write transactions from measured CMG to CMG2, if measured CMG is not CMG2."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to CMG3, if measured CMG is not CMG3.",
    "EventCode": "0x31B",
    "EventName": "BUS_WRITE_TOTAL_CMG3",
    "BriefDescription": "This event counts write transactions from measured CMG to CMG3, if measured CMG is not CMG3."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to tofu controller.",
    "EventCode": "0x31C",
    "EventName": "BUS_WRITE_TOTAL_TOFU",
    "BriefDescription": "This event counts write transactions from measured CMG to tofu controller."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to PCI controller.",
    "EventCode": "0x31D",
    "EventName": "BUS_WRITE_TOTAL_PCI",
    "BriefDescription": "This event counts write transactions from measured CMG to PCI controller."
  },
  {
    "PublicDescription": "This event counts write transactions from measured CMG to measured CMG local memory.",
    "EventCode": "0x31E",
    "EventName": "BUS_WRITE_TOTAL_MEM",
    "BriefDescription": "This event counts write transactions from measured CMG to measured CMG local memory."
  }
]
+128 −0
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[
  {
    "ArchStdEvent": "L1I_CACHE_REFILL"
  },
  {
    "ArchStdEvent": "L1I_TLB_REFILL"
  },
  {
    "ArchStdEvent": "L1D_CACHE_REFILL"
  },
  {
    "ArchStdEvent": "L1D_CACHE"
  },
  {
    "ArchStdEvent": "L1D_TLB_REFILL"
  },
  {
    "ArchStdEvent": "L1I_CACHE"
  },
  {
    "ArchStdEvent": "L1D_CACHE_WB"
  },
  {
    "ArchStdEvent": "L2D_CACHE"
  },
  {
    "ArchStdEvent": "L2D_CACHE_REFILL"
  },
  {
    "ArchStdEvent": "L2D_CACHE_WB"
  },
  {
    "ArchStdEvent": "L2D_TLB_REFILL"
  },
  {
    "ArchStdEvent": "L2I_TLB_REFILL"
  },
  {
    "ArchStdEvent": "L2D_TLB"
  },
  {
    "ArchStdEvent": "L2I_TLB"
  },
  {
    "PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.",
    "EventCode": "0x49",
    "EventName": "L1D_CACHE_REFILL_PRF",
    "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch."
  },
  {
    "PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.",
    "EventCode": "0x59",
    "EventName": "L2D_CACHE_REFILL_PRF",
    "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch."
  },
  {
    "PublicDescription": "This event counts L1D_CACHE_REFILL caused by demand access.",
    "EventCode": "0x200",
    "EventName": "L1D_CACHE_REFILL_DM",
    "BriefDescription": "This event counts L1D_CACHE_REFILL caused by demand access."
  },
  {
    "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.",
    "EventCode": "0x202",
    "EventName": "L1D_CACHE_REFILL_HWPRF",
    "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch."
  },
  {
    "PublicDescription": "This event counts outstanding L1D cache miss requests per cycle.",
    "EventCode": "0x208",
    "EventName": "L1_MISS_WAIT",
    "BriefDescription": "This event counts outstanding L1D cache miss requests per cycle."
  },
  {
    "PublicDescription": "This event counts outstanding L1I cache miss requests per cycle.",
    "EventCode": "0x209",
    "EventName": "L1I_MISS_WAIT",
    "BriefDescription": "This event counts outstanding L1I cache miss requests per cycle."
  },
  {
    "PublicDescription": "This event counts L2D_CACHE_REFILL caused by demand access.",
    "EventCode": "0x300",
    "EventName": "L2D_CACHE_REFILL_DM",
    "BriefDescription": "This event counts L2D_CACHE_REFILL caused by demand access."
  },
  {
    "PublicDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch.",
    "EventCode": "0x302",
    "EventName": "L2D_CACHE_REFILL_HWPRF",
    "BriefDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch."
  },
  {
    "PublicDescription": "This event counts outstanding L2 cache miss requests per cycle.",
    "EventCode": "0x308",
    "EventName": "L2_MISS_WAIT",
    "BriefDescription": "This event counts outstanding L2 cache miss requests per cycle."
  },
  {
    "PublicDescription": "This event counts the number of times of L2 cache miss.",
    "EventCode": "0x309",
    "EventName": "L2_MISS_COUNT",
    "BriefDescription": "This event counts the number of times of L2 cache miss."
  },
  {
    "PublicDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.",
    "EventCode": "0x325",
    "EventName": "L2D_SWAP_DM",
    "BriefDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch."
  },
  {
    "PublicDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access.",
    "EventCode": "0x326",
    "EventName": "L2D_CACHE_MIBMCH_PRF",
    "BriefDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access."
  },
  {
    "PublicDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.",
    "EventCode": "0x396",
    "EventName": "L2D_CACHE_SWAP_LOCAL",
    "BriefDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch."
  },
  {
    "PublicDescription": "This event counts energy consumption per cycle of L2 cache.",
    "EventCode": "0x3E0",
    "EventName": "EA_L2",
    "BriefDescription": "This event counts energy consumption per cycle of L2 cache."
  }
]
+5 −0
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[
  {
    "ArchStdEvent": "CPU_CYCLES"
  }
]
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[
  {
    "ArchStdEvent": "EXC_TAKEN"
  },
  {
    "ArchStdEvent": "EXC_UNDEF"
  },
  {
    "ArchStdEvent": "EXC_SVC"
  },
  {
    "ArchStdEvent": "EXC_PABORT"
  },
  {
    "ArchStdEvent": "EXC_DABORT"
  },
  {
    "ArchStdEvent": "EXC_IRQ"
  },
  {
    "ArchStdEvent": "EXC_FIQ"
  },
  {
    "ArchStdEvent": "EXC_SMC"
  },
  {
    "ArchStdEvent": "EXC_HVC"
  }
]
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