Commit 54928f2f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.6-2023-09-20' of... 

Merge tag 'amd-drm-fixes-6.6-2023-09-20' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.6-2023-09-20:

amdgpu:
- MST fix
- Vbios part number reporting fix
- Fix a possible memory leak in an error case in the RAS code
- Fix low resolution modes on eDP

amdkfd:
- Fix GPU address for user queue wptr when GART is not at 0

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230920222915.7789-1-alexander.deucher@amd.com
parents ab2bff59 cc39f9cc

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

+1 −1
Original line number Diff line number Diff line
@@ -1776,7 +1776,7 @@ static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev, 
	struct amdgpu_device *adev = drm_to_adev(ddev);

	struct atom_context *ctx = adev->mode_info.atom_context;



	return sysfs_emit(buf, "%s\n", ctx->vbios_ver_str);

	return sysfs_emit(buf, "%s\n", ctx->vbios_pn);

}



static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+1 −0
Original line number Diff line number Diff line
@@ -801,6 +801,7 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev, 
				enable ? "enable":"disable",

				get_ras_block_str(head),

				amdgpu_ras_is_poison_mode_supported(adev), ret);

			kfree(info);

			return ret;

		}

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+1 −1
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q, 


	if (q->wptr_bo) {

		wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1);

		queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off;

		queue_input.wptr_mc_addr = amdgpu_bo_gpu_offset(q->wptr_bo) + wptr_addr_off;

	}



	queue_input.is_kfd_process = 1;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+2 −2
Original line number Diff line number Diff line
@@ -6098,8 +6098,6 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, 


	if (recalculate_timing)

		drm_mode_set_crtcinfo(&saved_mode, 0);

	else if (!old_stream)

		drm_mode_set_crtcinfo(&mode, 0);



	/*

	 * If scaling is enabled and refresh rate didn't change
@@ -6661,6 +6659,8 @@ enum drm_mode_status amdgpu_dm_connector_mode_valid(struct drm_connector *connec 
		goto fail;

	}



	drm_mode_set_crtcinfo(mode, 0);



	stream = create_validate_stream_for_sink(aconnector, mode,

						 to_dm_connector_state(connector->state),

						 NULL);

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+17 −13
Original line number Diff line number Diff line
@@ -1178,12 +1178,15 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) 
		dto_params.otg_inst = tg->inst;

		dto_params.timing = &pipe_ctx->stream->timing;

		dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;

		if (dccg) {

			dccg->funcs->set_dtbclk_dto(dccg, &dto_params);

			dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);

			dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);

	} else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->disable_symclk_se)

		}

	} else if (dccg && dccg->funcs->disable_symclk_se) {

		dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,

				link_enc->transmitter - TRANSMITTER_UNIPHY_A);

	}



	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {

		/* TODO: This looks like a bug to me as we are disabling HPO IO when
@@ -2658,7 +2661,7 @@ void dce110_prepare_bandwidth( 
	struct clk_mgr *dccg = dc->clk_mgr;



	dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool);



	if (dccg)

		dccg->funcs->update_clocks(

				dccg,

				context,
@@ -2673,6 +2676,7 @@ void dce110_optimize_bandwidth( 


	dce110_set_displaymarks(dc, context);



	if (dccg)

		dccg->funcs->update_clocks(

				dccg,

				context,