Commit 545c80ab authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v6.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 "Some assorted pin control fixes, the most interesting will be the
  Intel patch fixing a classic problem: laptop touchpad IRQs...

   - Some pin drive register fixes in the Mediatek driver.

   - Return proper error code in the Aspeed driver, and revert and
     ill-advised force-disablement patch that needs to be reworked.

   - Fix AMD driver debug output.

   - Fix potential NULL dereference in the Single driver.

   - Fix a group definition error in the Qualcomm SM8450 LPASS driver.

   - Restore pins used in direct IRQ mode in the Intel driver (This
     fixes some laptop touchpads!)"

* tag 'pinctrl-v6.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: intel: Restore the pins that used to be in Direct IRQ mode
  pinctrl: qcom: sm8450-lpass-lpi: correct swr_rx_data group
  pinctrl: aspeed: Revert "Force to disable the function's signal"
  pinctrl: single: fix potential NULL dereference
  pinctrl: amd: Fix debug output for debounce time
  pinctrl: aspeed: Fix confusing types in return value
  pinctrl: mediatek: Fix the drive register definition of some Pins
parents 4cfd5afc a8520be3

drivers/pinctrl/aspeed/pinctrl-aspeed.c

+11 −2
Original line number Diff line number Diff line
@@ -93,10 +93,19 @@ static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx, 
static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx,

				   const struct aspeed_sig_expr *expr)

{

	int ret;



	pr_debug("Disabling signal %s for %s\n", expr->signal,

		 expr->function);



	ret = aspeed_sig_expr_eval(ctx, expr, true);

	if (ret < 0)

		return ret;



	if (ret)

		return aspeed_sig_expr_set(ctx, expr, false);



	return 0;

}



/**
@@ -114,7 +123,7 @@ static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx, 
	int ret = 0;



	if (!exprs)

		return true;

		return -EINVAL;



	while (*exprs && !ret) {

		ret = aspeed_sig_expr_disable(ctx, *exprs);

drivers/pinctrl/intel/pinctrl-intel.c

+13 −3
Original line number Diff line number Diff line
@@ -1709,6 +1709,12 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_ 
EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);



#ifdef CONFIG_PM_SLEEP

static bool __intel_gpio_is_direct_irq(u32 value)

{

	return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&

	       (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO);

}



static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)

{

	const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
@@ -1742,8 +1748,7 @@ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int 
	 * See https://bugzilla.kernel.org/show_bug.cgi?id=214749.

	 */

	value = readl(intel_get_padcfg(pctrl, pin, PADCFG0));

	if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&

	    (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO))

	if (__intel_gpio_is_direct_irq(value))

		return true;



	return false;
@@ -1873,7 +1878,12 @@ int intel_pinctrl_resume_noirq(struct device *dev) 
	for (i = 0; i < pctrl->soc->npins; i++) {

		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];



		if (!intel_pinctrl_should_save(pctrl, desc->number))

		if (!(intel_pinctrl_should_save(pctrl, desc->number) ||

		      /*

		       * If the firmware mangled the register contents too much,

		       * check the saved value for the Direct IRQ mode.

		       */

		      __intel_gpio_is_direct_irq(pads[i].padcfg0)))

			continue;



		intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);

drivers/pinctrl/mediatek/pinctrl-mt8195.c

+2 −2
Original line number Diff line number Diff line
@@ -659,7 +659,7 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_range[] = { 
	PIN_FIELD_BASE(10, 10, 4, 0x010, 0x10, 9, 3),

	PIN_FIELD_BASE(11, 11, 4, 0x000, 0x10, 24, 3),

	PIN_FIELD_BASE(12, 12, 4, 0x010, 0x10, 12, 3),

	PIN_FIELD_BASE(13, 13, 4, 0x010, 0x10, 27, 3),

	PIN_FIELD_BASE(13, 13, 4, 0x000, 0x10, 27, 3),

	PIN_FIELD_BASE(14, 14, 4, 0x010, 0x10, 15, 3),

	PIN_FIELD_BASE(15, 15, 4, 0x010, 0x10, 0, 3),

	PIN_FIELD_BASE(16, 16, 4, 0x010, 0x10, 18, 3),
@@ -708,7 +708,7 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_range[] = { 
	PIN_FIELD_BASE(78, 78, 3, 0x000, 0x10, 15, 3),

	PIN_FIELD_BASE(79, 79, 3, 0x000, 0x10, 18, 3),

	PIN_FIELD_BASE(80, 80, 3, 0x000, 0x10, 21, 3),

	PIN_FIELD_BASE(81, 81, 3, 0x000, 0x10, 28, 3),

	PIN_FIELD_BASE(81, 81, 3, 0x000, 0x10, 24, 3),

	PIN_FIELD_BASE(82, 82, 3, 0x000, 0x10, 27, 3),

	PIN_FIELD_BASE(83, 83, 3, 0x010, 0x10, 0, 3),

	PIN_FIELD_BASE(84, 84, 3, 0x010, 0x10, 3, 3),

drivers/pinctrl/pinctrl-amd.c

+1 −0
Original line number Diff line number Diff line
@@ -365,6 +365,7 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) 


			} else {

				debounce_enable = "  ∅";

				time = 0;

			}

			snprintf(debounce_value, sizeof(debounce_value), "%u", time * unit);

			seq_printf(s, "debounce %s (🕑 %sus)| ", debounce_enable, debounce_value);

drivers/pinctrl/pinctrl-single.c

+2 −0
Original line number Diff line number Diff line
@@ -372,6 +372,8 @@ static int pcs_set_mux(struct pinctrl_dev *pctldev, unsigned fselector, 
	if (!pcs->fmask)

		return 0;

	function = pinmux_generic_get_function(pctldev, fselector);

	if (!function)

		return -EINVAL;

	func = function->data;

	if (!func)

		return -EINVAL;